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[PATCH v1 3/5] ARM: dts: aspeed: Harma: Revise GPIO line name

Peter Yin posted 5 patches 1 week, 5 days ago
There is a newer version of this series
[PATCH v1 3/5] ARM: dts: aspeed: Harma: Revise GPIO line name
Posted by Peter Yin 1 week, 5 days ago 
  Add:
    "ac-power-button",
    "asic0-card-type-detection0-n"
    "asic0-card-type-detection1-n"
    "asic0-card-type-detection2-n"

    "cpu0-prochot-alert",
    "cpu0-thermtrip-alert",

    "irq-uv-detect-alert",
    "irq-hsc-alert",

    "uart-switch-button"
    "uart-switch-lsb"
    "uart-switch-msb"

    "leakage-detect-alert",

    "power-card-enable",
    "power-fault-n",
    "power-hsc-good",
    "power-chassis-good"
    "presence-post-card",
    "presence-cmm"
    "pvdd11-ocp-alert"

    "reset-control-cmos-clear"
    "reset-cause-pcie",
    "reset-cause-platrst",

    "P0_I3C_APML_ALERT_L",

  Rename:
    "power-cpu-good" to "host0-ready",
    "host-ready-n" to "post-end-n

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
---
 .../dts/aspeed/aspeed-bmc-facebook-harma.dts  | 58 ++++++++++++-------
 1 file changed, 37 insertions(+), 21 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
index fd85d5e34a55..ce1731bdc1af 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
@@ -416,12 +416,6 @@ gpio@31 {
 		reg = <0x31>;
 		gpio-controller;
 		#gpio-cells = <2>;
-
-		gpio-line-names =
-		"","","","",
-		"","","presence-cmm","",
-		"","","","",
-		"","","","";
 	};
 
 	// Aegis FRU
@@ -559,7 +553,8 @@ &gpio0 {
 	/*A0-A7*/	"","","","","","","","",
 	/*B0-B7*/	"","","","",
 			"bmc-spi-mux-select-0","led-identify","","",
-	/*C0-C7*/	"","","","","","","","",
+	/*C0-C7*/	"reset-cause-platrst","","","","",
+			"power-hsc-good","power-chassis-good","",
 	/*D0-D7*/	"","","sol-uart-select","","","","","",
 	/*E0-E7*/	"","","","","","","","",
 	/*F0-F7*/	"","","","","","","","",
@@ -568,7 +563,8 @@ &gpio0 {
 	/*I0-I7*/	"","","","","","","","",
 	/*J0-J7*/	"","","","","","","","",
 	/*K0-K7*/	"","","","","","","","",
-	/*L0-L7*/	"","","","","","","","",
+	/*L0-L7*/	"","","","",
+			"leakage-detect-alert","","","",
 	/*M0-M7*/	"","","","","","","","",
 	/*N0-N7*/	"led-postcode-0","led-postcode-1",
 			"led-postcode-2","led-postcode-3",
@@ -577,18 +573,29 @@ &gpio0 {
 	/*O0-O7*/	"","","","","","","","",
 	/*P0-P7*/	"power-button","power-host-control",
 			"reset-button","","led-power","","","",
-	/*Q0-Q7*/	"","","","","","power-chassis-control","","",
+	/*Q0-Q7*/
+			"","","","",
+			"","power-chassis-control","","uart-switch-button",
 	/*R0-R7*/	"","","","","","","","",
 	/*S0-S7*/	"","","","","","","","",
 	/*T0-T7*/	"","","","","","","","",
 	/*U0-U7*/	"","","","","","","led-identify-gate","",
 	/*V0-V7*/	"","","","",
 			"rtc-battery-voltage-read-enable","",
-			"power-chassis-good","",
+			"","",
 	/*W0-W7*/	"","","","","","","","",
 	/*X0-X7*/	"","","","","","","","",
 	/*Y0-Y7*/	"","","","","","","","",
-	/*Z0-Z7*/	"","","","","","","","";
+	/*Z0-Z7*/	"","","","","","","presence-post-card","";
+};
+
+&gpio1 {
+	gpio-line-names =
+	/*18A0-18A7*/ "ac-power-button","","","","","","","",
+	/*18B0-18B7*/ "","","","","","","","",
+	/*18C0-18C7*/ "","","","","","","","",
+	/*18D0-18D7*/ "","","","","","","","",
+	/*18E0-18E3*/ "","","","","","","","";
 };
 
 &sgpiom0 {
@@ -636,10 +643,10 @@ &sgpiom0 {
 	"","reset-control-cpu0-p1-mux",
 	"","reset-control-e1s-mux",
 	"power-host-good","reset-control-mb-mux",
-	"power-cpu-good","reset-control-smb-e1s-0",
+	"host0-ready","reset-control-smb-e1s-0",
 	/*E0-E3 line 64-71*/
 	"","reset-control-smb-e1s-1",
-	"host-ready-n","reset-control-srst",
+	"post-end-n","reset-control-srst",
 	"presence-e1s-0","reset-control-usb-hub",
 	"","reset-control",
 	/*E4-E7 line 72-79*/
@@ -656,7 +663,7 @@ &sgpiom0 {
 	"presence-asic-modules-0","rt-cpu0-p1-force-enable",
 	"presence-asic-modules-1","bios-debug-msg-disable",
 	"","uart-control-buffer-select",
-	"","ac-control-n",
+	"presence-cmm","ac-control-n",
 	/*G0-G3 line 96-103*/
 	"FM_CPU_CORETYPE2","",
 	"FM_CPU_CORETYPE1","",
@@ -668,7 +675,7 @@ &sgpiom0 {
 	"FM_BOARD_REV_ID2","",
 	"FM_BOARD_REV_ID1","",
 	/*H0-H3 line 112-119*/
-	"FM_BOARD_REV_ID0","",
+	"FM_BOARD_REV_ID0","reset-control-cmos-clear",
 	"","","","","","",
 	/*H4-H7 line 120-127*/
 	"","",
@@ -683,22 +690,31 @@ &sgpiom0 {
 	/*I4-I7 line 136-143*/
 	"","","","","","","","",
 	/*J0-J3 line 144-151*/
-	"","","","","","","","",
+	"","","power-card-enable","","","","","",
 	/*J4-J7 line 152-159*/
 	"SLOT_ID_BCB_0","",
 	"SLOT_ID_BCB_1","",
 	"SLOT_ID_BCB_2","",
 	"SLOT_ID_BCB_3","",
 	/*K0-K3 line 160-167*/
-	"","","","","","","","",
+	"","","","","","","P0_I3C_APML_ALERT_L","",
 	/*K4-K7 line 168-175*/
-	"","","","","","","","",
+	"","","","","","","irq-uv-detect-alert","",
 	/*L0-L3 line 176-183*/
-	"","","","","","","","",
+	"irq-hsc-alert","",
+	"cpu0-prochot-alert","",
+	"cpu0-thermtrip-alert","",
+	"reset-cause-pcie","",
 	/*L4-L7 line 184-191*/
-	"","","","","","","","",
+	"pvdd11-ocp-alert","",
+	"power-fault-n","",
+	"asic0-card-type-detection0-n","",
+	"asic0-card-type-detection1-n","",
 	/*M0-M3 line 192-199*/
-	"","","","","","","","",
+	"asic0-card-type-detection2-n","",
+	"uart-switch-lsb","",
+	"uart-switch-msb","",
+	"","",
 	/*M4-M7 line 200-207*/
 	"","","","","","","","",
 	/*N0-N3 line 208-215*/
-- 
2.25.1
Re: [PATCH v1 3/5] ARM: dts: aspeed: Harma: Revise GPIO line name
Posted by Andrew Jeffery 1 week, 4 days ago 
Hi Peter,

On Mon, 2024-11-11 at 17:43 +0800, Peter Yin wrote:
>   Add:
>     "ac-power-button",
>     "asic0-card-type-detection0-n"
>     "asic0-card-type-detection1-n"
>     "asic0-card-type-detection2-n"
> 
>     "cpu0-prochot-alert",
>     "cpu0-thermtrip-alert",
> 
>     "irq-uv-detect-alert",
>     "irq-hsc-alert",
> 
>     "uart-switch-button"
>     "uart-switch-lsb"
>     "uart-switch-msb"
> 
>     "leakage-detect-alert",
> 
>     "power-card-enable",
>     "power-fault-n",
>     "power-hsc-good",
>     "power-chassis-good"
>     "presence-post-card",
>     "presence-cmm"
>     "pvdd11-ocp-alert"
> 
>     "reset-control-cmos-clear"
>     "reset-cause-pcie",
>     "reset-cause-platrst",
> 
>     "P0_I3C_APML_ALERT_L",

Rather than list the identifiers that are already contained in the
patch, can you please discuss what functionality these identifiers
enable, how different functions are related, and why this must all be
done in one patch?

> 
>   Rename:
>     "power-cpu-good" to "host0-ready",
>     "host-ready-n" to "post-end-n

On the other-hand, explicitly calling out these changes is helpful, but
please also discuss the motivation and impact.

Andrew
Re: [PATCH v1 3/5] ARM: dts: aspeed: Harma: Revise GPIO line name
Posted by Peter Yin 1 week, 4 days ago 
On Tue, Nov 12, 2024 at 7:53 AM Andrew Jeffery
<andrew@codeconstruct.com.au> wrote:
>
> Hi Peter,
>
> On Mon, 2024-11-11 at 17:43 +0800, Peter Yin wrote:
> >   Add:
> >     "ac-power-button",
> >     "asic0-card-type-detection0-n"
> >     "asic0-card-type-detection1-n"
> >     "asic0-card-type-detection2-n"
> >
> >     "cpu0-prochot-alert",
> >     "cpu0-thermtrip-alert",
> >
> >     "irq-uv-detect-alert",
> >     "irq-hsc-alert",
> >
> >     "uart-switch-button"
> >     "uart-switch-lsb"
> >     "uart-switch-msb"
> >
> >     "leakage-detect-alert",
> >
> >     "power-card-enable",
> >     "power-fault-n",
> >     "power-hsc-good",
> >     "power-chassis-good"
> >     "presence-post-card",
> >     "presence-cmm"
> >     "pvdd11-ocp-alert"
> >
> >     "reset-control-cmos-clear"
> >     "reset-cause-pcie",
> >     "reset-cause-platrst",
> >
> >     "P0_I3C_APML_ALERT_L",
>
> Rather than list the identifiers that are already contained in the
> patch, can you please discuss what functionality these identifiers
> enable, how different functions are related, and why this must all be
> done in one patch?
>
> >
> >   Rename:
> >     "power-cpu-good" to "host0-ready",
> >     "host-ready-n" to "post-end-n
>
> On the other-hand, explicitly calling out these changes is helpful, but
> please also discuss the motivation and impact.
>
> Andrew

Hi Andrew,
    Understood, I'll include comments in the next version. Harma will
be moving into the DVT2 stage,
and many of the new GPIO lines weren't defined in the POC stage, so
I'll add this to the one page.

Thanks,
Peter.

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