From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
S32G2 and S32G3 SoCs use the same I2C controller as i.MX.
But there are small differences such as specific
<clock divider, register value> pairs.
So add new compatible strings 'nxp,s32g2-i2c'and 'nxp,s32g3-i2c'
for S32G2/S32G3 Socs.
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
index 85ee1282d6d2..0682a5a10d41 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
@@ -18,6 +18,7 @@ properties:
- const: fsl,imx1-i2c
- const: fsl,imx21-i2c
- const: fsl,vf610-i2c
+ - const: nxp,s32g2-i2c
- items:
- enum:
- fsl,ls1012a-i2c
@@ -54,6 +55,9 @@ properties:
- fsl,imx8mn-i2c
- fsl,imx8mp-i2c
- const: fsl,imx21-i2c
+ - items:
+ - const: nxp,s32g3-i2c
+ - const: nxp,s32g2-i2c
reg:
maxItems: 1
--
2.45.2
On Mon, Nov 04, 2024 at 12:00:43PM +0200, Ciprian Costea wrote: > From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> > > S32G2 and S32G3 SoCs use the same I2C controller as i.MX. > But there are small differences such as specific > <clock divider, register value> pairs. > So add new compatible strings 'nxp,s32g2-i2c'and 'nxp,s32g3-i2c' > for S32G2/S32G3 Socs. Acked-by: Conor Dooley <conor.dooley@microchip.com> > > Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> > --- > Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > index 85ee1282d6d2..0682a5a10d41 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > @@ -18,6 +18,7 @@ properties: > - const: fsl,imx1-i2c > - const: fsl,imx21-i2c > - const: fsl,vf610-i2c > + - const: nxp,s32g2-i2c > - items: > - enum: > - fsl,ls1012a-i2c > @@ -54,6 +55,9 @@ properties: > - fsl,imx8mn-i2c > - fsl,imx8mp-i2c > - const: fsl,imx21-i2c > + - items: > + - const: nxp,s32g3-i2c > + - const: nxp,s32g2-i2c > > reg: > maxItems: 1 > -- > 2.45.2 >
On Mon, Nov 04, 2024 at 12:00:43PM +0200, Ciprian Costea wrote: > From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> > > S32G2 and S32G3 SoCs use the same I2C controller as i.MX. > But there are small differences such as specific > <clock divider, register value> pairs. > So add new compatible strings 'nxp,s32g2-i2c'and 'nxp,s32g3-i2c' > for S32G2/S32G3 Socs. nit: Please wrap at 75 char or need empty line between segment. Reviewed-by: Frank Li <Frank.Li@nxp.com> > > Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> > --- > Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > index 85ee1282d6d2..0682a5a10d41 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > @@ -18,6 +18,7 @@ properties: > - const: fsl,imx1-i2c > - const: fsl,imx21-i2c > - const: fsl,vf610-i2c > + - const: nxp,s32g2-i2c > - items: > - enum: > - fsl,ls1012a-i2c > @@ -54,6 +55,9 @@ properties: > - fsl,imx8mn-i2c > - fsl,imx8mp-i2c > - const: fsl,imx21-i2c > + - items: > + - const: nxp,s32g3-i2c > + - const: nxp,s32g2-i2c > > reg: > maxItems: 1 > -- > 2.45.2 >
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