Export Zfbmin, Zvfbfmin, Zvfbfwma ISA extension through hwprobe.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
Documentation/arch/riscv/hwprobe.rst | 12 ++++++++++++
arch/riscv/include/uapi/asm/hwprobe.h | 3 +++
arch/riscv/kernel/sys_hwprobe.c | 3 +++
3 files changed, 18 insertions(+)
diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
index 85b709257918..8c30dd06f3c0 100644
--- a/Documentation/arch/riscv/hwprobe.rst
+++ b/Documentation/arch/riscv/hwprobe.rst
@@ -239,6 +239,18 @@ The following keys are defined:
ratified in commit 98918c844281 ("Merge pull request #1217 from
riscv/zawrs") of riscv-isa-manual.
+ * :c:macro:`RISCV_HWPROBE_EXT_ZFBFMIN`: The Zfbfmin extension is supported as
+ defined in the RISC-V ISA manual starting from commit 4dc23d6229de
+ ("Added Chapter title to BF16").
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFMIN`: The Zvfbfmin extension is supported as
+ defined in the RISC-V ISA manual starting from commit 4dc23d6229de
+ ("Added Chapter title to BF16").
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFWMA`: The Zvfbfwma extension is supported as
+ defined in the RISC-V ISA manual starting from commit 4dc23d6229de
+ ("Added Chapter title to BF16").
+
* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to
:c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
mistakenly classified as a bitmask rather than a value.
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 1e153cda57db..95d00a065b4e 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -72,6 +72,9 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_EXT_ZCF (1ULL << 46)
#define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47)
#define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48)
+#define RISCV_HWPROBE_EXT_ZFBFMIN (1ULL << 49)
+#define RISCV_HWPROBE_EXT_ZVFBFMIN (1ULL << 50)
+#define RISCV_HWPROBE_EXT_ZVFBFWMA (1ULL << 51)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c
index cea0ca2bf2a2..de1966bd1776 100644
--- a/arch/riscv/kernel/sys_hwprobe.c
+++ b/arch/riscv/kernel/sys_hwprobe.c
@@ -131,6 +131,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
EXT_KEY(ZVE64D);
EXT_KEY(ZVE64F);
EXT_KEY(ZVE64X);
+ EXT_KEY(ZVFBFMIN);
+ EXT_KEY(ZVFBFWMA);
EXT_KEY(ZVFH);
EXT_KEY(ZVFHMIN);
EXT_KEY(ZVKB);
@@ -147,6 +149,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
EXT_KEY(ZCD);
EXT_KEY(ZCF);
EXT_KEY(ZFA);
+ EXT_KEY(ZFBFMIN);
EXT_KEY(ZFH);
EXT_KEY(ZFHMIN);
}
--
2.47.0
On 03/11/2024 08:49, Inochi Amaoto wrote: > Export Zfbmin, Zvfbfmin, Zvfbfwma ISA extension through hwprobe. > > Signed-off-by: Inochi Amaoto <inochiama@gmail.com> > --- > Documentation/arch/riscv/hwprobe.rst | 12 ++++++++++++ > arch/riscv/include/uapi/asm/hwprobe.h | 3 +++ > arch/riscv/kernel/sys_hwprobe.c | 3 +++ > 3 files changed, 18 insertions(+) > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > index 85b709257918..8c30dd06f3c0 100644 > --- a/Documentation/arch/riscv/hwprobe.rst > +++ b/Documentation/arch/riscv/hwprobe.rst > @@ -239,6 +239,18 @@ The following keys are defined: > ratified in commit 98918c844281 ("Merge pull request #1217 from > riscv/zawrs") of riscv-isa-manual. > > + * :c:macro:`RISCV_HWPROBE_EXT_ZFBFMIN`: The Zfbfmin extension is supported as > + defined in the RISC-V ISA manual starting from commit 4dc23d6229de > + ("Added Chapter title to BF16"). > + > + * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFMIN`: The Zvfbfmin extension is supported as > + defined in the RISC-V ISA manual starting from commit 4dc23d6229de > + ("Added Chapter title to BF16"). > + > + * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFWMA`: The Zvfbfwma extension is supported as > + defined in the RISC-V ISA manual starting from commit 4dc23d6229de > + ("Added Chapter title to BF16"). > + > * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to > :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was > mistakenly classified as a bitmask rather than a value. > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > index 1e153cda57db..95d00a065b4e 100644 > --- a/arch/riscv/include/uapi/asm/hwprobe.h > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > @@ -72,6 +72,9 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_EXT_ZCF (1ULL << 46) > #define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47) > #define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48) > +#define RISCV_HWPROBE_EXT_ZFBFMIN (1ULL << 49) > +#define RISCV_HWPROBE_EXT_ZVFBFMIN (1ULL << 50) > +#define RISCV_HWPROBE_EXT_ZVFBFWMA (1ULL << 51) > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) > diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c > index cea0ca2bf2a2..de1966bd1776 100644 > --- a/arch/riscv/kernel/sys_hwprobe.c > +++ b/arch/riscv/kernel/sys_hwprobe.c > @@ -131,6 +131,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, > EXT_KEY(ZVE64D); > EXT_KEY(ZVE64F); > EXT_KEY(ZVE64X); > + EXT_KEY(ZVFBFMIN); > + EXT_KEY(ZVFBFWMA); > EXT_KEY(ZVFH); > EXT_KEY(ZVFHMIN); > EXT_KEY(ZVKB); > @@ -147,6 +149,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, > EXT_KEY(ZCD); > EXT_KEY(ZCF); > EXT_KEY(ZFA); > + EXT_KEY(ZFBFMIN); > EXT_KEY(ZFH); > EXT_KEY(ZFHMIN); > } Looks good to me ! Reviewed-by: Clément Léger <cleger@rivosinc.com> Thanks
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