From: Frank Li <Frank.Li@nxp.com>
Call common dwc suspend/resume function. Use dwc common iATU method to
send out PME_TURN_OFF message. In Old DWC implementations,
PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 register is reserved. So the
generic DWC implementation of sending the PME_Turn_Off message using a
dummy MMIO write cannot be used. Use previouse method to kick off
PME_TURN_OFF MSG for these platforms.
Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by
dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq().
dw_pcie_suspend_noirq()
dw_pcie_stop_link();
pci->pp.ops->deinit();
imx_pcie_host_exit();
Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and
imx_pcie_start_link() by dw_pcie_resume_noirq() in
imx_pcie_resume_noirq().
dw_pcie_resume_noirq()
pci->pp.ops->init();
imx_pcie_host_init();
dw_pcie_setup_rc();
dw_pcie_start_link();
imx_pcie_start_link();
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 96 ++++++++++-----------------
1 file changed, 35 insertions(+), 61 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index dbcf22e440e2..410a31e5f82a 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -33,6 +33,7 @@
#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
+#include "../../pci.h"
#include "pcie-designware.h"
#define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9)
@@ -83,6 +84,7 @@ enum imx_pcie_variants {
#define IMX_PCIE_FLAG_SUPPORT_64BIT BIT(7)
#define IMX_PCIE_FLAG_CPU_ADDR_FIXUP BIT(8)
#define IMX_PCIE_FLAG_CLOCKS_OPTIONAL BIT(9)
+#define IMX_PCIE_FLAG_CUSTOM_PME_TURNOFF BIT(10)
#define imx_check_flag(pci, val) (pci->drvdata->flags & val)
@@ -107,19 +109,18 @@ struct imx_pcie_drvdata {
int (*init_phy)(struct imx_pcie *pcie);
int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable);
int (*core_reset)(struct imx_pcie *pcie, bool assert);
+ const struct dw_pcie_host_ops *ops;
};
struct imx_pcie {
struct dw_pcie *pci;
struct gpio_desc *reset_gpiod;
- bool link_is_up;
struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS];
struct regmap *iomuxc_gpr;
u16 msi_ctrl;
u32 controller_id;
struct reset_control *pciephy_reset;
struct reset_control *apps_reset;
- struct reset_control *turnoff_reset;
u32 tx_deemph_gen1;
u32 tx_deemph_gen2_3p5db;
u32 tx_deemph_gen2_6db;
@@ -898,13 +899,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci)
dev_info(dev, "Link: Only Gen1 is enabled\n");
}
- imx_pcie->link_is_up = true;
tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS);
return 0;
err_reset_phy:
- imx_pcie->link_is_up = false;
dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
@@ -1023,9 +1022,32 @@ static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr)
return cpu_addr - entry->offset;
}
+/*
+ * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2
+ * register is reserved. So the generic DWC implementation of sending the
+ * PME_Turn_Off message using a dummy MMIO write cannot be used.
+ */
+static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp)
+{
+ struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+ struct imx_pcie *imx_pcie = to_imx_pcie(pci);
+
+ regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
+ regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
+
+ usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US);
+}
+
+
static const struct dw_pcie_host_ops imx_pcie_host_ops = {
.init = imx_pcie_host_init,
.deinit = imx_pcie_host_exit,
+ .pme_turn_off = imx_pcie_pme_turn_off,
+};
+
+static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = {
+ .init = imx_pcie_host_init,
+ .deinit = imx_pcie_host_exit,
};
static const struct dw_pcie_ops dw_pcie_ops = {
@@ -1146,43 +1168,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie,
return 0;
}
-static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie)
-{
- struct device *dev = imx_pcie->pci->dev;
-
- /* Some variants have a turnoff reset in DT */
- if (imx_pcie->turnoff_reset) {
- reset_control_assert(imx_pcie->turnoff_reset);
- reset_control_deassert(imx_pcie->turnoff_reset);
- goto pm_turnoff_sleep;
- }
-
- /* Others poke directly at IOMUXC registers */
- switch (imx_pcie->drvdata->variant) {
- case IMX6SX:
- case IMX6QP:
- regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
- IMX6SX_GPR12_PCIE_PM_TURN_OFF,
- IMX6SX_GPR12_PCIE_PM_TURN_OFF);
- regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
- IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0);
- break;
- default:
- dev_err(dev, "PME_Turn_Off not implemented\n");
- return;
- }
-
- /*
- * Components with an upstream port must respond to
- * PME_Turn_Off with PME_TO_Ack but we can't check.
- *
- * The standard recommends a 1-10ms timeout after which to
- * proceed anyway as if acks were received.
- */
-pm_turnoff_sleep:
- usleep_range(1000, 10000);
-}
-
static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
{
u8 offset;
@@ -1206,36 +1191,26 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
static int imx_pcie_suspend_noirq(struct device *dev)
{
struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
- struct dw_pcie_rp *pp = &imx_pcie->pci->pp;
if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND))
return 0;
imx_pcie_msi_save_restore(imx_pcie, true);
- imx_pcie_pm_turnoff(imx_pcie);
- imx_pcie_stop_link(imx_pcie->pci);
- imx_pcie_host_exit(pp);
-
- return 0;
+ return dw_pcie_suspend_noirq(imx_pcie->pci);
}
static int imx_pcie_resume_noirq(struct device *dev)
{
int ret;
struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
- struct dw_pcie_rp *pp = &imx_pcie->pci->pp;
if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND))
return 0;
- ret = imx_pcie_host_init(pp);
+ ret = dw_pcie_resume_noirq(imx_pcie->pci);
if (ret)
return ret;
imx_pcie_msi_save_restore(imx_pcie, false);
- dw_pcie_setup_rc(pp);
-
- if (imx_pcie->link_is_up)
- imx_pcie_start_link(imx_pcie->pci);
return 0;
}
@@ -1267,11 +1242,14 @@ static int imx_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
- pci->pp.ops = &imx_pcie_host_ops;
imx_pcie->pci = pci;
imx_pcie->drvdata = of_device_get_match_data(dev);
+ pci->pp.ops = &imx_pcie_host_dw_pme_ops;
+ if (imx_pcie->drvdata->ops)
+ pci->pp.ops = imx_pcie->drvdata->ops;
+
/* Find the PHY if one is defined, only imx7d uses it */
np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0);
if (np) {
@@ -1345,13 +1323,6 @@ static int imx_pcie_probe(struct platform_device *pdev)
break;
}
- /* Grab turnoff reset */
- imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff");
- if (IS_ERR(imx_pcie->turnoff_reset)) {
- dev_err(dev, "Failed to get TURNOFF reset control\n");
- return PTR_ERR(imx_pcie->turnoff_reset);
- }
-
if (imx_pcie->drvdata->gpr) {
/* Grab GPR config register range */
imx_pcie->iomuxc_gpr =
@@ -1430,6 +1401,7 @@ static int imx_pcie_probe(struct platform_device *pdev)
if (ret < 0)
return ret;
} else {
+ pci->pp.use_atu_msg = true;
ret = dw_pcie_host_init(&pci->pp);
if (ret < 0)
return ret;
@@ -1494,6 +1466,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
.init_phy = imx6sx_pcie_init_phy,
.enable_ref_clk = imx6sx_pcie_enable_ref_clk,
.core_reset = imx6sx_pcie_core_reset,
+ .ops = &imx_pcie_host_ops,
},
[IMX6QP] = {
.variant = IMX6QP,
@@ -1511,6 +1484,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
.init_phy = imx_pcie_init_phy,
.enable_ref_clk = imx6q_pcie_enable_ref_clk,
.core_reset = imx6qp_pcie_core_reset,
+ .ops = &imx_pcie_host_ops,
},
[IMX7D] = {
.variant = IMX7D,
--
2.37.1On Thu, Oct 31, 2024 at 04:06:53PM +0800, Richard Zhu wrote:
> From: Frank Li <Frank.Li@nxp.com>
>
> Call common dwc suspend/resume function. Use dwc common iATU method to
> send out PME_TURN_OFF message. In Old DWC implementations,
> PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 register is reserved. So the
> generic DWC implementation of sending the PME_Turn_Off message using a
> dummy MMIO write cannot be used. Use previouse method to kick off
> PME_TURN_OFF MSG for these platforms.
>
> Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by
> dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq().
because dw_pcie_suspend_noirq() already do these, see below call stack:
>
> dw_pcie_suspend_noirq()
> dw_pcie_stop_link();
> pci->pp.ops->deinit();
> imx_pcie_host_exit();
>
> Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and
> imx_pcie_start_link() by dw_pcie_resume_noirq() in
> imx_pcie_resume_noirq().
because it dw_pcie_resume_noirq() already do these, see below call stack:
>
> dw_pcie_resume_noirq()
> pci->pp.ops->init();
> imx_pcie_host_init();
> dw_pcie_setup_rc();
> dw_pcie_start_link();
> imx_pcie_start_link();
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 96 ++++++++++-----------------
> 1 file changed, 35 insertions(+), 61 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index dbcf22e440e2..410a31e5f82a 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -33,6 +33,7 @@
> #include <linux/pm_domain.h>
> #include <linux/pm_runtime.h>
>
> +#include "../../pci.h"
> #include "pcie-designware.h"
>
> #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9)
> @@ -83,6 +84,7 @@ enum imx_pcie_variants {
> #define IMX_PCIE_FLAG_SUPPORT_64BIT BIT(7)
> #define IMX_PCIE_FLAG_CPU_ADDR_FIXUP BIT(8)
> #define IMX_PCIE_FLAG_CLOCKS_OPTIONAL BIT(9)
> +#define IMX_PCIE_FLAG_CUSTOM_PME_TURNOFF BIT(10)
>
> #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
>
> @@ -107,19 +109,18 @@ struct imx_pcie_drvdata {
> int (*init_phy)(struct imx_pcie *pcie);
> int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable);
> int (*core_reset)(struct imx_pcie *pcie, bool assert);
> + const struct dw_pcie_host_ops *ops;
> };
>
> struct imx_pcie {
> struct dw_pcie *pci;
> struct gpio_desc *reset_gpiod;
> - bool link_is_up;
> struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS];
> struct regmap *iomuxc_gpr;
> u16 msi_ctrl;
> u32 controller_id;
> struct reset_control *pciephy_reset;
> struct reset_control *apps_reset;
> - struct reset_control *turnoff_reset;
> u32 tx_deemph_gen1;
> u32 tx_deemph_gen2_3p5db;
> u32 tx_deemph_gen2_6db;
> @@ -898,13 +899,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci)
> dev_info(dev, "Link: Only Gen1 is enabled\n");
> }
>
> - imx_pcie->link_is_up = true;
> tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
> dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS);
> return 0;
>
> err_reset_phy:
> - imx_pcie->link_is_up = false;
> dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> @@ -1023,9 +1022,32 @@ static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr)
> return cpu_addr - entry->offset;
> }
>
> +/*
> + * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2
> + * register is reserved. So the generic DWC implementation of sending the
> + * PME_Turn_Off message using a dummy MMIO write cannot be used.
> + */
> +static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp)
> +{
> + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> + struct imx_pcie *imx_pcie = to_imx_pcie(pci);
> +
> + regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
> + regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
> +
> + usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US);
> +}
> +
> +
> static const struct dw_pcie_host_ops imx_pcie_host_ops = {
> .init = imx_pcie_host_init,
> .deinit = imx_pcie_host_exit,
> + .pme_turn_off = imx_pcie_pme_turn_off,
> +};
> +
> +static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = {
> + .init = imx_pcie_host_init,
> + .deinit = imx_pcie_host_exit,
> };
>
> static const struct dw_pcie_ops dw_pcie_ops = {
> @@ -1146,43 +1168,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie,
> return 0;
> }
>
> -static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie)
> -{
> - struct device *dev = imx_pcie->pci->dev;
> -
> - /* Some variants have a turnoff reset in DT */
> - if (imx_pcie->turnoff_reset) {
> - reset_control_assert(imx_pcie->turnoff_reset);
> - reset_control_deassert(imx_pcie->turnoff_reset);
> - goto pm_turnoff_sleep;
> - }
> -
> - /* Others poke directly at IOMUXC registers */
> - switch (imx_pcie->drvdata->variant) {
> - case IMX6SX:
> - case IMX6QP:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
> - IMX6SX_GPR12_PCIE_PM_TURN_OFF,
> - IMX6SX_GPR12_PCIE_PM_TURN_OFF);
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
> - IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0);
> - break;
> - default:
> - dev_err(dev, "PME_Turn_Off not implemented\n");
> - return;
> - }
> -
> - /*
> - * Components with an upstream port must respond to
> - * PME_Turn_Off with PME_TO_Ack but we can't check.
> - *
> - * The standard recommends a 1-10ms timeout after which to
> - * proceed anyway as if acks were received.
> - */
> -pm_turnoff_sleep:
> - usleep_range(1000, 10000);
> -}
> -
> static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
> {
> u8 offset;
> @@ -1206,36 +1191,26 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
> static int imx_pcie_suspend_noirq(struct device *dev)
> {
> struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
> - struct dw_pcie_rp *pp = &imx_pcie->pci->pp;
>
> if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND))
> return 0;
>
> imx_pcie_msi_save_restore(imx_pcie, true);
> - imx_pcie_pm_turnoff(imx_pcie);
> - imx_pcie_stop_link(imx_pcie->pci);
> - imx_pcie_host_exit(pp);
> -
> - return 0;
> + return dw_pcie_suspend_noirq(imx_pcie->pci);
> }
>
> static int imx_pcie_resume_noirq(struct device *dev)
> {
> int ret;
> struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
> - struct dw_pcie_rp *pp = &imx_pcie->pci->pp;
>
> if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND))
> return 0;
>
> - ret = imx_pcie_host_init(pp);
> + ret = dw_pcie_resume_noirq(imx_pcie->pci);
> if (ret)
> return ret;
> imx_pcie_msi_save_restore(imx_pcie, false);
> - dw_pcie_setup_rc(pp);
> -
> - if (imx_pcie->link_is_up)
> - imx_pcie_start_link(imx_pcie->pci);
>
> return 0;
> }
> @@ -1267,11 +1242,14 @@ static int imx_pcie_probe(struct platform_device *pdev)
>
> pci->dev = dev;
> pci->ops = &dw_pcie_ops;
> - pci->pp.ops = &imx_pcie_host_ops;
>
> imx_pcie->pci = pci;
> imx_pcie->drvdata = of_device_get_match_data(dev);
>
> + pci->pp.ops = &imx_pcie_host_dw_pme_ops;
> + if (imx_pcie->drvdata->ops)
> + pci->pp.ops = imx_pcie->drvdata->ops;
> +
> /* Find the PHY if one is defined, only imx7d uses it */
> np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0);
> if (np) {
> @@ -1345,13 +1323,6 @@ static int imx_pcie_probe(struct platform_device *pdev)
> break;
> }
>
> - /* Grab turnoff reset */
> - imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff");
> - if (IS_ERR(imx_pcie->turnoff_reset)) {
> - dev_err(dev, "Failed to get TURNOFF reset control\n");
> - return PTR_ERR(imx_pcie->turnoff_reset);
> - }
> -
> if (imx_pcie->drvdata->gpr) {
> /* Grab GPR config register range */
> imx_pcie->iomuxc_gpr =
> @@ -1430,6 +1401,7 @@ static int imx_pcie_probe(struct platform_device *pdev)
> if (ret < 0)
> return ret;
> } else {
> + pci->pp.use_atu_msg = true;
> ret = dw_pcie_host_init(&pci->pp);
> if (ret < 0)
> return ret;
> @@ -1494,6 +1466,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .init_phy = imx6sx_pcie_init_phy,
> .enable_ref_clk = imx6sx_pcie_enable_ref_clk,
> .core_reset = imx6sx_pcie_core_reset,
> + .ops = &imx_pcie_host_ops,
> },
> [IMX6QP] = {
> .variant = IMX6QP,
> @@ -1511,6 +1484,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .init_phy = imx_pcie_init_phy,
> .enable_ref_clk = imx6q_pcie_enable_ref_clk,
> .core_reset = imx6qp_pcie_core_reset,
> + .ops = &imx_pcie_host_ops,
> },
> [IMX7D] = {
> .variant = IMX7D,
> --
> 2.37.1
>
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