On Thu, Oct 31, 2024 at 3:03 PM Cody Eksal <masterr3c0rd@epochal.quest> wrote:
>
> The A100, similar to the H6 and H616, use an NVMEM value to determine
> speed binnings. The method used is similar to that of the H6. However,
> the information is stored at a slightly different bit offset.
>
> Add a new compatible for the A100.
>
> Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest>
Acked-by: Chen-Yu Tsai <wens@csie.org>
I assume Viresh will take this along with the cpufreq driver patch.
> ---
> Changes in V2:
> - Fix ordering of compatibles
>
> .../bindings/opp/allwinner,sun50i-h6-operating-points.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml
> index ec5e424bb3c8..75ab552f6ecd 100644
> --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml
> +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml
> @@ -22,6 +22,7 @@ allOf:
> properties:
> compatible:
> enum:
> + - allwinner,sun50i-a100-operating-points
> - allwinner,sun50i-h6-operating-points
> - allwinner,sun50i-h616-operating-points
>
> --
> 2.47.0
>