[PATCH v5 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI

Inochi Amaoto posted 3 patches 3 weeks, 3 days ago
[PATCH v5 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
Posted by Inochi Amaoto 3 weeks, 3 days ago
Sophgo SG2044 has a new version of T-HEAD C920, which implement
a fully featured T-HEAD ACLINT device. This ACLINT device contains
a SSWI device to support fast S-mode IPI.

Add necessary compatible string for the T-HEAD ACLINT sswi device.

Link: https://www.xrvm.com/product/xuantie/C920
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 .../thead,c900-aclint-sswi.yaml               | 58 +++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
new file mode 100644
index 000000000000..64559ddc931a
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-sswi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device
+
+maintainers:
+  - Inochi Amaoto <inochiama@outlook.com>
+
+description:
+  The SSWI device is a part of the THEAD ACLINT device. It provides
+  supervisor-level IPI functionality for a set of HARTs on a THEAD
+  platform. It provides a register to set an IPI (SETSSIP) for each
+  HART connected to the SSWI device.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - sophgo,sg2044-aclint-sswi
+      - const: thead,c900-aclint-sswi
+
+  reg:
+    maxItems: 1
+
+  "#interrupt-cells":
+    const: 0
+
+  interrupt-controller: true
+
+  interrupts-extended:
+    minItems: 1
+    maxItems: 4095
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - "#interrupt-cells"
+  - interrupt-controller
+  - interrupts-extended
+
+examples:
+  - |
+    interrupt-controller@94000000 {
+      compatible = "sophgo,sg2044-aclint-sswi", "thead,c900-aclint-sswi";
+      reg = <0x94000000 0x00004000>;
+      #interrupt-cells = <0>;
+      interrupt-controller;
+      interrupts-extended = <&cpu1intc 1>,
+                            <&cpu2intc 1>,
+                            <&cpu3intc 1>,
+                            <&cpu4intc 1>;
+    };
+...
-- 
2.47.0
Re: [PATCH v5 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
Posted by Inochi Amaoto 3 weeks, 3 days ago
On Thu, Oct 31, 2024 at 02:08:57PM +0800, Inochi Amaoto wrote:
> Sophgo SG2044 has a new version of T-HEAD C920, which implement
> a fully featured T-HEAD ACLINT device. This ACLINT device contains
> a SSWI device to support fast S-mode IPI.
> 
> Add necessary compatible string for the T-HEAD ACLINT sswi device.
> 
> Link: https://www.xrvm.com/product/xuantie/C920
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>

Hi, Conor,

Could you review it again? I have updated the description of
the binding and mark the device is T-HEAD specific.

Regards,
Inochi
Re: [PATCH v5 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
Posted by Conor Dooley 3 weeks, 3 days ago
On Thu, Oct 31, 2024 at 02:14:40PM +0800, Inochi Amaoto wrote:
> On Thu, Oct 31, 2024 at 02:08:57PM +0800, Inochi Amaoto wrote:
> > Sophgo SG2044 has a new version of T-HEAD C920, which implement
> > a fully featured T-HEAD ACLINT device. This ACLINT device contains
> > a SSWI device to support fast S-mode IPI.
> > 
> > Add necessary compatible string for the T-HEAD ACLINT sswi device.
> > 
> > Link: https://www.xrvm.com/product/xuantie/C920
> > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> 
> Hi, Conor,
> 
> Could you review it again? I have updated the description of
> the binding and mark the device is T-HEAD specific.

Only thing I would say is that
title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device
should probably be
title: T-Head c900 ACLINT Supervisor-level Software Interrupt Device
or similar, since this isn't Sophgo's IP.

w/ that,
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
(dunno if Thomas is willing to change that on application)
Re: [PATCH v5 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
Posted by Thomas Gleixner 3 weeks, 3 days ago
On Thu, Oct 31 2024 at 12:38, Conor Dooley wrote:
> On Thu, Oct 31, 2024 at 02:14:40PM +0800, Inochi Amaoto wrote:
>> On Thu, Oct 31, 2024 at 02:08:57PM +0800, Inochi Amaoto wrote:
>> > Sophgo SG2044 has a new version of T-HEAD C920, which implement
>> > a fully featured T-HEAD ACLINT device. This ACLINT device contains
>> > a SSWI device to support fast S-mode IPI.
>> > 
>> > Add necessary compatible string for the T-HEAD ACLINT sswi device.
>> > 
>> > Link: https://www.xrvm.com/product/xuantie/C920
>> > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
>> 
>> Hi, Conor,
>> 
>> Could you review it again? I have updated the description of
>> the binding and mark the device is T-HEAD specific.
>
> Only thing I would say is that
> title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device
> should probably be
> title: T-Head c900 ACLINT Supervisor-level Software Interrupt Device
> or similar, since this isn't Sophgo's IP.
>
> w/ that,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> (dunno if Thomas is willing to change that on application)

Yes
Re: [PATCH v5 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
Posted by Inochi Amaoto 3 weeks, 3 days ago
On Thu, Oct 31, 2024 at 02:10:18PM +0100, Thomas Gleixner wrote:
> On Thu, Oct 31 2024 at 12:38, Conor Dooley wrote:
> > On Thu, Oct 31, 2024 at 02:14:40PM +0800, Inochi Amaoto wrote:
> >> On Thu, Oct 31, 2024 at 02:08:57PM +0800, Inochi Amaoto wrote:
> >> > Sophgo SG2044 has a new version of T-HEAD C920, which implement
> >> > a fully featured T-HEAD ACLINT device. This ACLINT device contains
> >> > a SSWI device to support fast S-mode IPI.
> >> > 
> >> > Add necessary compatible string for the T-HEAD ACLINT sswi device.
> >> > 
> >> > Link: https://www.xrvm.com/product/xuantie/C920
> >> > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> >> 
> >> Hi, Conor,
> >> 
> >> Could you review it again? I have updated the description of
> >> the binding and mark the device is T-HEAD specific.
> >
> > Only thing I would say is that
> > title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device
> > should probably be
> > title: T-Head c900 ACLINT Supervisor-level Software Interrupt Device
> > or similar, since this isn't Sophgo's IP.
> >
> > w/ that,
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > (dunno if Thomas is willing to change that on application)
> 
> Yes

Thanks.
[tip: irq/core] dt-bindings: interrupt-controller: Add T-HEAD C900 ACLINT SSWI device
Posted by tip-bot2 for Inochi Amaoto 2 weeks, 4 days ago
The following commit has been merged into the irq/core branch of tip:

Commit-ID:     2631c2b8e5c3406af62b60413ea04e155be9ebcc
Gitweb:        https://git.kernel.org/tip/2631c2b8e5c3406af62b60413ea04e155be9ebcc
Author:        Inochi Amaoto <inochiama@gmail.com>
AuthorDate:    Thu, 31 Oct 2024 14:08:57 +08:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Thu, 07 Nov 2024 00:28:27 +01:00

dt-bindings: interrupt-controller: Add T-HEAD C900 ACLINT SSWI device

Sophgo SG2044 has a new version of T-HEAD C920, which implement a fully
featured T-HEAD ACLINT device. This ACLINT device contains a SSWI device to
support fast S-mode IPI.

Add necessary compatible string for the T-HEAD ACLINT SSWI device.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/all/20241031060859.722258-2-inochiama@gmail.com
Link: https://www.xrvm.com/product/xuantie/C920

---
 Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
new file mode 100644
index 0000000..8d33090
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-sswi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: T-HEAD C900 ACLINT Supervisor-level Software Interrupt Device
+
+maintainers:
+  - Inochi Amaoto <inochiama@outlook.com>
+
+description:
+  The SSWI device is a part of the THEAD ACLINT device. It provides
+  supervisor-level IPI functionality for a set of HARTs on a THEAD
+  platform. It provides a register to set an IPI (SETSSIP) for each
+  HART connected to the SSWI device.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - sophgo,sg2044-aclint-sswi
+      - const: thead,c900-aclint-sswi
+
+  reg:
+    maxItems: 1
+
+  "#interrupt-cells":
+    const: 0
+
+  interrupt-controller: true
+
+  interrupts-extended:
+    minItems: 1
+    maxItems: 4095
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - "#interrupt-cells"
+  - interrupt-controller
+  - interrupts-extended
+
+examples:
+  - |
+    interrupt-controller@94000000 {
+      compatible = "sophgo,sg2044-aclint-sswi", "thead,c900-aclint-sswi";
+      reg = <0x94000000 0x00004000>;
+      #interrupt-cells = <0>;
+      interrupt-controller;
+      interrupts-extended = <&cpu1intc 1>,
+                            <&cpu2intc 1>,
+                            <&cpu3intc 1>,
+                            <&cpu4intc 1>;
+    };
+...