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[PATCH v6 1/5] riscv: dts: starfive: jh7110-common: revised device node

Guodong Xu posted 5 patches 4 weeks ago
There is a newer version of this series
[PATCH v6 1/5] riscv: dts: starfive: jh7110-common: revised device node
Posted by Guodong Xu 4 weeks ago 
Earlier this year a new DTSI file was created to define common
properties for the StarFive VisionFive 2 and Milk-V Mars boards,
both of which use the StarFive JH7110 SoC.  The Pine64 Star64
board has also been added since that time.

Some of the nodes defined in "jh7110-common.dtsi" are enabled in
that file because all of the boards including it "want" them
enabled.

An upcoming patch enables another JH7110 board, but for that
board not all of these common nodes should be enabled.  Prepare
for supporting the new board by avoiding enabling these nodes in
"jh711-common.dtsi", and enable them instead in these files:
   jh7110-milkv-mars.dts
   jh7110-pine64-star64.dts
   jh7110-starfive-visionfive-2.dtsi

Signed-off-by: Alex Elder <elder@riscstar.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v6: New patch

 .../boot/dts/starfive/jh7110-common.dtsi      |  5 -----
 .../boot/dts/starfive/jh7110-milkv-mars.dts   | 17 ++++++++++++++++
 .../dts/starfive/jh7110-pine64-star64.dts     | 17 ++++++++++++++++
 .../jh7110-starfive-visionfive-2.dtsi         | 20 +++++++++++++++++++
 4 files changed, 54 insertions(+), 5 deletions(-)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index c7771b3b6475..9e77f79ec162 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
 .../boot/dts/starfive/jh7110-common.dtsi      |  5 -----
 .../boot/dts/starfive/jh7110-milkv-mars.dts   | 17 ++++++++++++++++
 .../dts/starfive/jh7110-pine64-star64.dts     | 17 ++++++++++++++++
 .../jh7110-starfive-visionfive-2.dtsi         | 20 +++++++++++++++++++
 4 files changed, 54 insertions(+), 5 deletions(-)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index c7771b3b6475..9e77f79ec162 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -176,7 +176,6 @@ csi2rx_to_camss: endpoint {
 &gmac0 {
 	phy-handle = <&phy0>;
 	phy-mode = "rgmii-id";
-	status = "okay";
 
 	mdio {
 		#address-cells = <1>;
@@ -196,7 +195,6 @@ &i2c0 {
 	i2c-scl-falling-time-ns = <510>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c0_pins>;
-	status = "okay";
 };
 
 &i2c2 {
@@ -311,7 +309,6 @@ &pcie1 {
 &pwmdac {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pwmdac_pins>;
-	status = "okay";
 };
 
 &qspi {
@@ -350,13 +347,11 @@ uboot@100000 {
 &pwm {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pwm_pins>;
-	status = "okay";
 };
 
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_pins>;
-	status = "okay";
 
 	spi_dev0: spi@0 {
 		compatible = "rohm,dh2228fv";
diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
index 5cb9e99e1dac..66ad3eb2fd66 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
@@ -15,6 +15,11 @@ &gmac0 {
 	starfive,tx-use-rgmii-clk;
 	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
 	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
 };
 
 &pcie0 {
@@ -35,3 +40,15 @@ &phy0 {
 	rx-internal-delay-ps = <1500>;
 	tx-internal-delay-ps = <1500>;
 };
+
+&pwm {
+	status = "okay";
+};
+
+&pwmdac {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
index b720cdd15ed6..dbc8612b8464 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
@@ -18,6 +18,7 @@ &gmac0 {
 	starfive,tx-use-rgmii-clk;
 	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
 	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+	status = "okay";
 };
 
 &gmac1 {
@@ -39,6 +40,10 @@ phy1: ethernet-phy@1 {
 	};
 };
 
+&i2c0 {
+	status = "okay";
+};
+
 &pcie1 {
 	status = "okay";
 };
@@ -63,3 +68,15 @@ &phy1 {
 	motorcomm,tx-clk-10-inverted;
 	motorcomm,tx-clk-100-inverted;
 };
+
+&pwm {
+	status = "okay";
+};
+
+&pwmdac {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 18f38fc790a4..ef93a394bb2f 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -13,6 +13,10 @@ aliases {
 	};
 };
 
+&gmac0 {
+	status = "okay";
+};
+
 &gmac1 {
 	phy-handle = <&phy1>;
 	phy-mode = "rgmii-id";
@@ -29,6 +33,10 @@ phy1: ethernet-phy@1 {
 	};
 };
 
+&i2c0 {
+	status = "okay";
+};
+
 &mmc0 {
 	non-removable;
 };
@@ -40,3 +48,15 @@ &pcie0 {
 &pcie1 {
 	status = "okay";
 };
+
+&pwm {
+	status = "okay";
+};
+
+&pwmdac {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
-- 
2.34.1
Re: [PATCH v6 1/5] riscv: dts: starfive: jh7110-common: revised device node
Posted by Emil Renner Berthing 4 weeks ago 
Guodong Xu wrote:
> Earlier this year a new DTSI file was created to define common
> properties for the StarFive VisionFive 2 and Milk-V Mars boards,
> both of which use the StarFive JH7110 SoC.  The Pine64 Star64
> board has also been added since that time.
>
> Some of the nodes defined in "jh7110-common.dtsi" are enabled in
> that file because all of the boards including it "want" them
> enabled.
>
> An upcoming patch enables another JH7110 board, but for that
> board not all of these common nodes should be enabled.  Prepare
> for supporting the new board by avoiding enabling these nodes in
> "jh711-common.dtsi", and enable them instead in these files:

jh7110-common.dtsi

>    jh7110-milkv-mars.dts
>    jh7110-pine64-star64.dts
>    jh7110-starfive-visionfive-2.dtsi
>
> Signed-off-by: Alex Elder <elder@riscstar.com>
> Signed-off-by: Guodong Xu <guodong@riscstar.com>
> ---
> v6: New patch
>
>  .../boot/dts/starfive/jh7110-common.dtsi      |  5 -----
>  .../boot/dts/starfive/jh7110-milkv-mars.dts   | 17 ++++++++++++++++
>  .../dts/starfive/jh7110-pine64-star64.dts     | 17 ++++++++++++++++
>  .../jh7110-starfive-visionfive-2.dtsi         | 20 +++++++++++++++++++
>  4 files changed, 54 insertions(+), 5 deletions(-)
>

From here..

> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> index c7771b3b6475..9e77f79ec162 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
>  .../boot/dts/starfive/jh7110-common.dtsi      |  5 -----
>  .../boot/dts/starfive/jh7110-milkv-mars.dts   | 17 ++++++++++++++++
>  .../dts/starfive/jh7110-pine64-star64.dts     | 17 ++++++++++++++++
>  .../jh7110-starfive-visionfive-2.dtsi         | 20 +++++++++++++++++++
>  4 files changed, 54 insertions(+), 5 deletions(-)

..to here seems to be added by mistake. At least my "git am" wouldn't apply it
like this.

With that fixed this looks good to me, thanks.

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> index c7771b3b6475..9e77f79ec162 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> @@ -176,7 +176,6 @@ csi2rx_to_camss: endpoint {
>  &gmac0 {
>  	phy-handle = <&phy0>;
>  	phy-mode = "rgmii-id";
> -	status = "okay";
>
>  	mdio {
>  		#address-cells = <1>;
> @@ -196,7 +195,6 @@ &i2c0 {
>  	i2c-scl-falling-time-ns = <510>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&i2c0_pins>;
> -	status = "okay";
>  };
>
>  &i2c2 {
> @@ -311,7 +309,6 @@ &pcie1 {
>  &pwmdac {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pwmdac_pins>;
> -	status = "okay";
>  };
>
>  &qspi {
> @@ -350,13 +347,11 @@ uboot@100000 {
>  &pwm {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pwm_pins>;
> -	status = "okay";
>  };
>
>  &spi0 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&spi0_pins>;
> -	status = "okay";
>
>  	spi_dev0: spi@0 {
>  		compatible = "rohm,dh2228fv";
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> index 5cb9e99e1dac..66ad3eb2fd66 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> @@ -15,6 +15,11 @@ &gmac0 {
>  	starfive,tx-use-rgmii-clk;
>  	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
>  	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
>  };
>
>  &pcie0 {
> @@ -35,3 +40,15 @@ &phy0 {
>  	rx-internal-delay-ps = <1500>;
>  	tx-internal-delay-ps = <1500>;
>  };
> +
> +&pwm {
> +	status = "okay";
> +};
> +
> +&pwmdac {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> index b720cdd15ed6..dbc8612b8464 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> @@ -18,6 +18,7 @@ &gmac0 {
>  	starfive,tx-use-rgmii-clk;
>  	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
>  	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> +	status = "okay";
>  };
>
>  &gmac1 {
> @@ -39,6 +40,10 @@ phy1: ethernet-phy@1 {
>  	};
>  };
>
> +&i2c0 {
> +	status = "okay";
> +};
> +
>  &pcie1 {
>  	status = "okay";
>  };
> @@ -63,3 +68,15 @@ &phy1 {
>  	motorcomm,tx-clk-10-inverted;
>  	motorcomm,tx-clk-100-inverted;
>  };
> +
> +&pwm {
> +	status = "okay";
> +};
> +
> +&pwmdac {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index 18f38fc790a4..ef93a394bb2f 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -13,6 +13,10 @@ aliases {
>  	};
>  };
>
> +&gmac0 {
> +	status = "okay";
> +};
> +
>  &gmac1 {
>  	phy-handle = <&phy1>;
>  	phy-mode = "rgmii-id";
> @@ -29,6 +33,10 @@ phy1: ethernet-phy@1 {
>  	};
>  };
>
> +&i2c0 {
> +	status = "okay";
> +};
> +
>  &mmc0 {
>  	non-removable;
>  };
> @@ -40,3 +48,15 @@ &pcie0 {
>  &pcie1 {
>  	status = "okay";
>  };
> +
> +&pwm {
> +	status = "okay";
> +};
> +
> +&pwmdac {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> --
> 2.34.1
>
Re: [PATCH v6 1/5] riscv: dts: starfive: jh7110-common: revised device node
Posted by Guodong Xu 4 weeks ago 
On Mon, Oct 28, 2024 at 12:35 AM Emil Renner Berthing
<emil.renner.berthing@canonical.com> wrote:
>
> Guodong Xu wrote:
> > Earlier this year a new DTSI file was created to define common
> > properties for the StarFive VisionFive 2 and Milk-V Mars boards,
> > both of which use the StarFive JH7110 SoC.  The Pine64 Star64
> > board has also been added since that time.
> >
> > Some of the nodes defined in "jh7110-common.dtsi" are enabled in
> > that file because all of the boards including it "want" them
> > enabled.
> >
> > An upcoming patch enables another JH7110 board, but for that
> > board not all of these common nodes should be enabled.  Prepare
> > for supporting the new board by avoiding enabling these nodes in
> > "jh711-common.dtsi", and enable them instead in these files:
>
> jh7110-common.dtsi
>

Will fix.

> >    jh7110-milkv-mars.dts
> >    jh7110-pine64-star64.dts
> >    jh7110-starfive-visionfive-2.dtsi
> >
> > Signed-off-by: Alex Elder <elder@riscstar.com>
> > Signed-off-by: Guodong Xu <guodong@riscstar.com>
> > ---
> > v6: New patch
> >
> >  .../boot/dts/starfive/jh7110-common.dtsi      |  5 -----
> >  .../boot/dts/starfive/jh7110-milkv-mars.dts   | 17 ++++++++++++++++
> >  .../dts/starfive/jh7110-pine64-star64.dts     | 17 ++++++++++++++++
> >  .../jh7110-starfive-visionfive-2.dtsi         | 20 +++++++++++++++++++
> >  4 files changed, 54 insertions(+), 5 deletions(-)
> >
>
> From here..
>
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> > index c7771b3b6475..9e77f79ec162 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> >  .../boot/dts/starfive/jh7110-common.dtsi      |  5 -----
> >  .../boot/dts/starfive/jh7110-milkv-mars.dts   | 17 ++++++++++++++++
> >  .../dts/starfive/jh7110-pine64-star64.dts     | 17 ++++++++++++++++
> >  .../jh7110-starfive-visionfive-2.dtsi         | 20 +++++++++++++++++++
> >  4 files changed, 54 insertions(+), 5 deletions(-)
>
> ..to here seems to be added by mistake. At least my "git am" wouldn't apply it
> like this.
>

My editing mistake. I will fix that.

> With that fixed this looks good to me, thanks.
>
> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
>

Thank you, Emil.

> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> > index c7771b3b6475..9e77f79ec162 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> > @@ -176,7 +176,6 @@ csi2rx_to_camss: endpoint {
> >  &gmac0 {
> >       phy-handle = <&phy0>;
> >       phy-mode = "rgmii-id";
> > -     status = "okay";
> >
> >       mdio {
> >               #address-cells = <1>;
> > @@ -196,7 +195,6 @@ &i2c0 {
> >       i2c-scl-falling-time-ns = <510>;
> >       pinctrl-names = "default";
> >       pinctrl-0 = <&i2c0_pins>;
> > -     status = "okay";
> >  };
> >
> >  &i2c2 {
> > @@ -311,7 +309,6 @@ &pcie1 {
> >  &pwmdac {
> >       pinctrl-names = "default";
> >       pinctrl-0 = <&pwmdac_pins>;
> > -     status = "okay";
> >  };
> >
> >  &qspi {
> > @@ -350,13 +347,11 @@ uboot@100000 {
> >  &pwm {
> >       pinctrl-names = "default";
> >       pinctrl-0 = <&pwm_pins>;
> > -     status = "okay";
> >  };
> >
> >  &spi0 {
> >       pinctrl-names = "default";
> >       pinctrl-0 = <&spi0_pins>;
> > -     status = "okay";
> >
> >       spi_dev0: spi@0 {
> >               compatible = "rohm,dh2228fv";
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > index 5cb9e99e1dac..66ad3eb2fd66 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > @@ -15,6 +15,11 @@ &gmac0 {
> >       starfive,tx-use-rgmii-clk;
> >       assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> >       assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> > +     status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +     status = "okay";
> >  };
> >
> >  &pcie0 {
> > @@ -35,3 +40,15 @@ &phy0 {
> >       rx-internal-delay-ps = <1500>;
> >       tx-internal-delay-ps = <1500>;
> >  };
> > +
> > +&pwm {
> > +     status = "okay";
> > +};
> > +
> > +&pwmdac {
> > +     status = "okay";
> > +};
> > +
> > +&spi0 {
> > +     status = "okay";
> > +};
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> > index b720cdd15ed6..dbc8612b8464 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> > @@ -18,6 +18,7 @@ &gmac0 {
> >       starfive,tx-use-rgmii-clk;
> >       assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> >       assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> > +     status = "okay";
> >  };
> >
> >  &gmac1 {
> > @@ -39,6 +40,10 @@ phy1: ethernet-phy@1 {
> >       };
> >  };
> >
> > +&i2c0 {
> > +     status = "okay";
> > +};
> > +
> >  &pcie1 {
> >       status = "okay";
> >  };
> > @@ -63,3 +68,15 @@ &phy1 {
> >       motorcomm,tx-clk-10-inverted;
> >       motorcomm,tx-clk-100-inverted;
> >  };
> > +
> > +&pwm {
> > +     status = "okay";
> > +};
> > +
> > +&pwmdac {
> > +     status = "okay";
> > +};
> > +
> > +&spi0 {
> > +     status = "okay";
> > +};
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > index 18f38fc790a4..ef93a394bb2f 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > @@ -13,6 +13,10 @@ aliases {
> >       };
> >  };
> >
> > +&gmac0 {
> > +     status = "okay";
> > +};
> > +
> >  &gmac1 {
> >       phy-handle = <&phy1>;
> >       phy-mode = "rgmii-id";
> > @@ -29,6 +33,10 @@ phy1: ethernet-phy@1 {
> >       };
> >  };
> >
> > +&i2c0 {
> > +     status = "okay";
> > +};
> > +
> >  &mmc0 {
> >       non-removable;
> >  };
> > @@ -40,3 +48,15 @@ &pcie0 {
> >  &pcie1 {
> >       status = "okay";
> >  };
> > +
> > +&pwm {
> > +     status = "okay";
> > +};
> > +
> > +&pwmdac {
> > +     status = "okay";
> > +};
> > +
> > +&spi0 {
> > +     status = "okay";
> > +};
> > --
> > 2.34.1
> >

Patchew 2.1-devel-b67e4c2

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