arch/x86/kernel/kvm.c | 4 ++++ 1 file changed, 4 insertions(+)
AMD SEV-SNP and Intel TDX have limited access to MTRR: either it is not
advertised in CPUID or it cannot be programmed (on TDX, due to #VE on
CR0.CD clear).
This results in guests using uncached mappings where it shouldn't and
pmd/pud_set_huge() failures due to non-uniform memory type reported by
mtrr_type_lookup().
Override MTRR state, making it WB by default as the kernel does for
Hyper-V guests.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Suggested-by: Binbin Wu <binbin.wu@intel.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
---
arch/x86/kernel/kvm.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 263f8aed4e2c..21e9e4845354 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -37,6 +37,7 @@
#include <asm/apic.h>
#include <asm/apicdef.h>
#include <asm/hypervisor.h>
+#include <asm/mtrr.h>
#include <asm/tlb.h>
#include <asm/cpuidle_haltpoll.h>
#include <asm/ptrace.h>
@@ -980,6 +981,9 @@ static void __init kvm_init_platform(void)
}
kvmclock_init();
x86_platform.apic_post_init = kvm_apic_init;
+
+ /* Set WB as the default cache mode for SEV-SNP and TDX */
+ mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
}
#if defined(CONFIG_AMD_MEM_ENCRYPT)
--
2.45.2On 10/15/24 11:58, Kirill A. Shutemov wrote: > AMD SEV-SNP and Intel TDX have limited access to MTRR: either it is not > advertised in CPUID or it cannot be programmed (on TDX, due to #VE on > CR0.CD clear). > > This results in guests using uncached mappings where it shouldn't and > pmd/pud_set_huge() failures due to non-uniform memory type reported by > mtrr_type_lookup(). > > Override MTRR state, making it WB by default as the kernel does for > Hyper-V guests. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > Suggested-by: Binbin Wu <binbin.wu@intel.com> > Cc: Juergen Gross <jgross@suse.com> > Cc: Tom Lendacky <thomas.lendacky@amd.com> Queued, thanks. I'll leave the follow up to the owners of the tip tree. Paolo > --- > arch/x86/kernel/kvm.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c > index 263f8aed4e2c..21e9e4845354 100644 > --- a/arch/x86/kernel/kvm.c > +++ b/arch/x86/kernel/kvm.c > @@ -37,6 +37,7 @@ > #include <asm/apic.h> > #include <asm/apicdef.h> > #include <asm/hypervisor.h> > +#include <asm/mtrr.h> > #include <asm/tlb.h> > #include <asm/cpuidle_haltpoll.h> > #include <asm/ptrace.h> > @@ -980,6 +981,9 @@ static void __init kvm_init_platform(void) > } > kvmclock_init(); > x86_platform.apic_post_init = kvm_apic_init; > + > + /* Set WB as the default cache mode for SEV-SNP and TDX */ > + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); > } > > #if defined(CONFIG_AMD_MEM_ENCRYPT)
On 15.10.24 11:58, Kirill A. Shutemov wrote: > AMD SEV-SNP and Intel TDX have limited access to MTRR: either it is not > advertised in CPUID or it cannot be programmed (on TDX, due to #VE on > CR0.CD clear). > > This results in guests using uncached mappings where it shouldn't and > pmd/pud_set_huge() failures due to non-uniform memory type reported by > mtrr_type_lookup(). > > Override MTRR state, making it WB by default as the kernel does for > Hyper-V guests. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > Suggested-by: Binbin Wu <binbin.wu@intel.com> > Cc: Juergen Gross <jgross@suse.com> > Cc: Tom Lendacky <thomas.lendacky@amd.com> > --- > arch/x86/kernel/kvm.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c > index 263f8aed4e2c..21e9e4845354 100644 > --- a/arch/x86/kernel/kvm.c > +++ b/arch/x86/kernel/kvm.c > @@ -37,6 +37,7 @@ > #include <asm/apic.h> > #include <asm/apicdef.h> > #include <asm/hypervisor.h> > +#include <asm/mtrr.h> > #include <asm/tlb.h> > #include <asm/cpuidle_haltpoll.h> > #include <asm/ptrace.h> > @@ -980,6 +981,9 @@ static void __init kvm_init_platform(void) > } > kvmclock_init(); > x86_platform.apic_post_init = kvm_apic_init; > + > + /* Set WB as the default cache mode for SEV-SNP and TDX */ > + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); Do you really want to do this for _all_ KVM guests? I'd expect this call to be conditional on TDX or SEV-SNP. Juergen
On 10/15/24 03:12, Jürgen Groß wrote: >> >> + /* Set WB as the default cache mode for SEV-SNP and TDX */ >> + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); > > Do you really want to do this for _all_ KVM guests? > > I'd expect this call to be conditional on TDX or SEV-SNP. I was confused by this as well. Shouldn't mtrr_overwrite_state() be named something more like: guest_force_mtrr_state() or something? The mtrr_overwrite_state() comment is pretty good, but it looks quite confusing from the caller.
On Tue, Oct 15, 2024 at 06:14:29AM -0700, Dave Hansen wrote: > On 10/15/24 03:12, Jürgen Groß wrote: > >> > >> + /* Set WB as the default cache mode for SEV-SNP and TDX */ > >> + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); > > > > Do you really want to do this for _all_ KVM guests? > > > > I'd expect this call to be conditional on TDX or SEV-SNP. > > I was confused by this as well. > > Shouldn't mtrr_overwrite_state() be named something more like: > > guest_force_mtrr_state() > > or something? > > The mtrr_overwrite_state() comment is pretty good, but it looks quite > confusing from the caller. I can submit a following up patch with rename if it is fine. -- Kiryl Shutsemau / Kirill A. Shutemov
On 15.10.24 15:54, Kirill A. Shutemov wrote: > On Tue, Oct 15, 2024 at 06:14:29AM -0700, Dave Hansen wrote: >> On 10/15/24 03:12, Jürgen Groß wrote: >>>> >>>> + /* Set WB as the default cache mode for SEV-SNP and TDX */ >>>> + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); >>> >>> Do you really want to do this for _all_ KVM guests? >>> >>> I'd expect this call to be conditional on TDX or SEV-SNP. >> >> I was confused by this as well. >> >> Shouldn't mtrr_overwrite_state() be named something more like: >> >> guest_force_mtrr_state() >> >> or something? >> >> The mtrr_overwrite_state() comment is pretty good, but it looks quite >> confusing from the caller. > > I can submit a following up patch with rename if it is fine. > Fine with me. Juergen
On Tue, Oct 15, 2024 at 12:12:51PM +0200, Jürgen Groß wrote: > On 15.10.24 11:58, Kirill A. Shutemov wrote: > > AMD SEV-SNP and Intel TDX have limited access to MTRR: either it is not > > advertised in CPUID or it cannot be programmed (on TDX, due to #VE on > > CR0.CD clear). > > > > This results in guests using uncached mappings where it shouldn't and > > pmd/pud_set_huge() failures due to non-uniform memory type reported by > > mtrr_type_lookup(). > > > > Override MTRR state, making it WB by default as the kernel does for > > Hyper-V guests. > > > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > > Suggested-by: Binbin Wu <binbin.wu@intel.com> > > Cc: Juergen Gross <jgross@suse.com> > > Cc: Tom Lendacky <thomas.lendacky@amd.com> > > --- > > arch/x86/kernel/kvm.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c > > index 263f8aed4e2c..21e9e4845354 100644 > > --- a/arch/x86/kernel/kvm.c > > +++ b/arch/x86/kernel/kvm.c > > @@ -37,6 +37,7 @@ > > #include <asm/apic.h> > > #include <asm/apicdef.h> > > #include <asm/hypervisor.h> > > +#include <asm/mtrr.h> > > #include <asm/tlb.h> > > #include <asm/cpuidle_haltpoll.h> > > #include <asm/ptrace.h> > > @@ -980,6 +981,9 @@ static void __init kvm_init_platform(void) > > } > > kvmclock_init(); > > x86_platform.apic_post_init = kvm_apic_init; > > + > > + /* Set WB as the default cache mode for SEV-SNP and TDX */ > > + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); > > Do you really want to do this for _all_ KVM guests? > > I'd expect this call to be conditional on TDX or SEV-SNP. mtrr_overwrite_state() checks it internally. -- Kiryl Shutsemau / Kirill A. Shutemov
On 15.10.24 14:31, Kirill A. Shutemov wrote: > On Tue, Oct 15, 2024 at 12:12:51PM +0200, Jürgen Groß wrote: >> On 15.10.24 11:58, Kirill A. Shutemov wrote: >>> AMD SEV-SNP and Intel TDX have limited access to MTRR: either it is not >>> advertised in CPUID or it cannot be programmed (on TDX, due to #VE on >>> CR0.CD clear). >>> >>> This results in guests using uncached mappings where it shouldn't and >>> pmd/pud_set_huge() failures due to non-uniform memory type reported by >>> mtrr_type_lookup(). >>> >>> Override MTRR state, making it WB by default as the kernel does for >>> Hyper-V guests. >>> >>> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> >>> Suggested-by: Binbin Wu <binbin.wu@intel.com> >>> Cc: Juergen Gross <jgross@suse.com> >>> Cc: Tom Lendacky <thomas.lendacky@amd.com> >>> --- >>> arch/x86/kernel/kvm.c | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c >>> index 263f8aed4e2c..21e9e4845354 100644 >>> --- a/arch/x86/kernel/kvm.c >>> +++ b/arch/x86/kernel/kvm.c >>> @@ -37,6 +37,7 @@ >>> #include <asm/apic.h> >>> #include <asm/apicdef.h> >>> #include <asm/hypervisor.h> >>> +#include <asm/mtrr.h> >>> #include <asm/tlb.h> >>> #include <asm/cpuidle_haltpoll.h> >>> #include <asm/ptrace.h> >>> @@ -980,6 +981,9 @@ static void __init kvm_init_platform(void) >>> } >>> kvmclock_init(); >>> x86_platform.apic_post_init = kvm_apic_init; >>> + >>> + /* Set WB as the default cache mode for SEV-SNP and TDX */ >>> + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); >> >> Do you really want to do this for _all_ KVM guests? >> >> I'd expect this call to be conditional on TDX or SEV-SNP. > > mtrr_overwrite_state() checks it internally. Ah, right, I forgot I added that check on request by Boris. :-) Reviewed-by: Juergen Gross <jgross@suse.com> Juergen
Rename the helper to better reflect its function.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Suggested-by: Dave Hansen <dave.hansen@intel.com>
---
arch/x86/hyperv/ivm.c | 2 +-
arch/x86/include/asm/mtrr.h | 10 +++++-----
arch/x86/kernel/cpu/mtrr/generic.c | 6 +++---
arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +-
arch/x86/kernel/kvm.c | 2 +-
arch/x86/xen/enlighten_pv.c | 4 ++--
6 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 60fc3ed72830..90aabe1fd3b6 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -664,7 +664,7 @@ void __init hv_vtom_init(void)
x86_platform.guest.enc_status_change_finish = hv_vtom_set_host_visibility;
/* Set WB as the default cache mode. */
- mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
+ guest_force_mtrr_state(NULL, 0, MTRR_TYPE_WRBACK);
}
#endif /* defined(CONFIG_AMD_MEM_ENCRYPT) || defined(CONFIG_INTEL_TDX_GUEST) */
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 4218248083d9..c69e269937c5 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -58,8 +58,8 @@ struct mtrr_state_type {
*/
# ifdef CONFIG_MTRR
void mtrr_bp_init(void);
-void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
- mtrr_type def_type);
+void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
+ mtrr_type def_type);
extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
extern void mtrr_save_fixed_ranges(void *);
extern void mtrr_save_state(void);
@@ -75,9 +75,9 @@ void mtrr_disable(void);
void mtrr_enable(void);
void mtrr_generic_set_state(void);
# else
-static inline void mtrr_overwrite_state(struct mtrr_var_range *var,
- unsigned int num_var,
- mtrr_type def_type)
+static inline void guest_force_mtrr_state(struct mtrr_var_range *var,
+ unsigned int num_var,
+ mtrr_type def_type)
{
}
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 7b29ebda024f..2fdfda2b60e4 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -423,7 +423,7 @@ void __init mtrr_copy_map(void)
}
/**
- * mtrr_overwrite_state - set static MTRR state
+ * guest_force_mtrr_state - set static MTRR state for a guest
*
* Used to set MTRR state via different means (e.g. with data obtained from
* a hypervisor).
@@ -436,8 +436,8 @@ void __init mtrr_copy_map(void)
* @num_var: length of the @var array
* @def_type: default caching type
*/
-void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
- mtrr_type def_type)
+void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
+ mtrr_type def_type)
{
unsigned int i;
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
index 989d368be04f..ecbda0341a8a 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.c
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
@@ -625,7 +625,7 @@ void mtrr_save_state(void)
static int __init mtrr_init_finalize(void)
{
/*
- * Map might exist if mtrr_overwrite_state() has been called or if
+ * Map might exist if guest_force_mtrr_state() has been called or if
* mtrr_enabled() returns true.
*/
mtrr_copy_map();
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 21e9e4845354..7a422a6c5983 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -983,7 +983,7 @@ static void __init kvm_init_platform(void)
x86_platform.apic_post_init = kvm_apic_init;
/* Set WB as the default cache mode for SEV-SNP and TDX */
- mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
+ guest_force_mtrr_state(NULL, 0, MTRR_TYPE_WRBACK);
}
#if defined(CONFIG_AMD_MEM_ENCRYPT)
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index d6818c6cafda..633469fab536 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -171,7 +171,7 @@ static void __init xen_set_mtrr_data(void)
/* Only overwrite MTRR state if any MTRR could be got from Xen. */
if (reg)
- mtrr_overwrite_state(var, reg, MTRR_TYPE_UNCACHABLE);
+ guest_force_mtrr_state(var, reg, MTRR_TYPE_UNCACHABLE);
#endif
}
@@ -195,7 +195,7 @@ static void __init xen_pv_init_platform(void)
if (xen_initial_domain())
xen_set_mtrr_data();
else
- mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
+ guest_force_mtrr_state(NULL, 0, MTRR_TYPE_WRBACK);
/* Adjust nr_cpu_ids before "enumeration" happens */
xen_smp_count_cpus();
--
2.45.2On Wed, Oct 16, 2024 at 01:50:48PM +0300, Kirill A. Shutemov wrote: > Rename the helper to better reflect its function. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > Suggested-by: Dave Hansen <dave.hansen@intel.com> KVM patch is Linus' tree. Dave, can you take this one? -- Kiryl Shutsemau / Kirill A. Shutemov
On 10/29/24 08:13, Kirill A. Shutemov wrote: > On Wed, Oct 16, 2024 at 01:50:48PM +0300, Kirill A. Shutemov wrote: >> Rename the helper to better reflect its function. >> >> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> >> Suggested-by: Dave Hansen <dave.hansen@intel.com> > > KVM patch is Linus' tree. > > Dave, can you take this one? Not easily without a merge of Paolo's KVM bits. The confusion that might cause isn't quite worth it for a rename. I can either stash this somewhere or I'm also fine if Paolo takes it on top of your other patch: Acked-by: Dave Hansen <dave.hansen@intel.com>
On Tue, Oct 29, 2024 at 10:37:07AM -0700, Dave Hansen wrote: > On 10/29/24 08:13, Kirill A. Shutemov wrote: > > On Wed, Oct 16, 2024 at 01:50:48PM +0300, Kirill A. Shutemov wrote: > >> Rename the helper to better reflect its function. > >> > >> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > >> Suggested-by: Dave Hansen <dave.hansen@intel.com> > > > > KVM patch is Linus' tree. > > > > Dave, can you take this one? > > Not easily without a merge of Paolo's KVM bits. The confusion that > might cause isn't quite worth it for a rename. I can either stash this > somewhere or I'm also fine if Paolo takes it on top of your other patch: > > Acked-by: Dave Hansen <dave.hansen@intel.com> I don't follow what is the problem. As I said KVM patch is already in Linus' tree -- v6.12-rc5 -- and tip tree already uses the tag as basis for x86/urgent. Hm? -- Kiryl Shutsemau / Kirill A. Shutemov
From: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Sent: Wednesday, October 16, 2024 3:51 AM
>
> Rename the helper to better reflect its function.
>
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> Suggested-by: Dave Hansen <dave.hansen@intel.com>
> ---
> arch/x86/hyperv/ivm.c | 2 +-
> arch/x86/include/asm/mtrr.h | 10 +++++-----
> arch/x86/kernel/cpu/mtrr/generic.c | 6 +++---
> arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +-
> arch/x86/kernel/kvm.c | 2 +-
> arch/x86/xen/enlighten_pv.c | 4 ++--
> 6 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
> index 60fc3ed72830..90aabe1fd3b6 100644
> --- a/arch/x86/hyperv/ivm.c
> +++ b/arch/x86/hyperv/ivm.c
> @@ -664,7 +664,7 @@ void __init hv_vtom_init(void)
> x86_platform.guest.enc_status_change_finish = hv_vtom_set_host_visibility;
>
> /* Set WB as the default cache mode. */
> - mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
> + guest_force_mtrr_state(NULL, 0, MTRR_TYPE_WRBACK);
> }
>
> #endif /* defined(CONFIG_AMD_MEM_ENCRYPT) ||
> defined(CONFIG_INTEL_TDX_GUEST) */
> diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
> index 4218248083d9..c69e269937c5 100644
> --- a/arch/x86/include/asm/mtrr.h
> +++ b/arch/x86/include/asm/mtrr.h
> @@ -58,8 +58,8 @@ struct mtrr_state_type {
> */
> # ifdef CONFIG_MTRR
> void mtrr_bp_init(void);
> -void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
> - mtrr_type def_type);
> +void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
> + mtrr_type def_type);
> extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
> extern void mtrr_save_fixed_ranges(void *);
> extern void mtrr_save_state(void);
> @@ -75,9 +75,9 @@ void mtrr_disable(void);
> void mtrr_enable(void);
> void mtrr_generic_set_state(void);
> # else
> -static inline void mtrr_overwrite_state(struct mtrr_var_range *var,
> - unsigned int num_var,
> - mtrr_type def_type)
> +static inline void guest_force_mtrr_state(struct mtrr_var_range *var,
> + unsigned int num_var,
> + mtrr_type def_type)
> {
> }
>
> diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
> index 7b29ebda024f..2fdfda2b60e4 100644
> --- a/arch/x86/kernel/cpu/mtrr/generic.c
> +++ b/arch/x86/kernel/cpu/mtrr/generic.c
> @@ -423,7 +423,7 @@ void __init mtrr_copy_map(void)
> }
>
> /**
> - * mtrr_overwrite_state - set static MTRR state
> + * guest_force_mtrr_state - set static MTRR state for a guest
> *
> * Used to set MTRR state via different means (e.g. with data obtained from
> * a hypervisor).
> @@ -436,8 +436,8 @@ void __init mtrr_copy_map(void)
> * @num_var: length of the @var array
> * @def_type: default caching type
> */
> -void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
> - mtrr_type def_type)
> +void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
> + mtrr_type def_type)
> {
> unsigned int i;
>
> diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
> index 989d368be04f..ecbda0341a8a 100644
> --- a/arch/x86/kernel/cpu/mtrr/mtrr.c
> +++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
> @@ -625,7 +625,7 @@ void mtrr_save_state(void)
> static int __init mtrr_init_finalize(void)
> {
> /*
> - * Map might exist if mtrr_overwrite_state() has been called or if
> + * Map might exist if guest_force_mtrr_state() has been called or if
> * mtrr_enabled() returns true.
> */
> mtrr_copy_map();
> diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
> index 21e9e4845354..7a422a6c5983 100644
> --- a/arch/x86/kernel/kvm.c
> +++ b/arch/x86/kernel/kvm.c
> @@ -983,7 +983,7 @@ static void __init kvm_init_platform(void)
> x86_platform.apic_post_init = kvm_apic_init;
>
> /* Set WB as the default cache mode for SEV-SNP and TDX */
> - mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
> + guest_force_mtrr_state(NULL, 0, MTRR_TYPE_WRBACK);
> }
>
> #if defined(CONFIG_AMD_MEM_ENCRYPT)
> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
> index d6818c6cafda..633469fab536 100644
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -171,7 +171,7 @@ static void __init xen_set_mtrr_data(void)
>
> /* Only overwrite MTRR state if any MTRR could be got from Xen. */
> if (reg)
> - mtrr_overwrite_state(var, reg, MTRR_TYPE_UNCACHABLE);
> + guest_force_mtrr_state(var, reg, MTRR_TYPE_UNCACHABLE);
> #endif
> }
>
> @@ -195,7 +195,7 @@ static void __init xen_pv_init_platform(void)
> if (xen_initial_domain())
> xen_set_mtrr_data();
> else
> - mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
> + guest_force_mtrr_state(NULL, 0, MTRR_TYPE_WRBACK);
>
> /* Adjust nr_cpu_ids before "enumeration" happens */
> xen_smp_count_cpus();
> --
> 2.45.2
>
LGTM
Reviewed-by: Michael Kelley <mhklinux@outlook.com>
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