There are some new features for Mediatek SoC MT8196, which include new
command/data transmitting and receiving path (abbreviated as tx/rx), and
two modified register settings.

The driver code has to be adapted to implement the above changes, and the
compatible string 'mediatek,mt8196-mmc' is added to driver and devicetree
bindings.

---
Changes in v3:
- Separate the settings for stop_dly_sel and pop_en_cnt to a different
  commit; 
- Add the original value of stop_dly_sel to the platdata of legacy SoCs,
  for unified code setting;
- Change to return if host->top_base is NULL in msdc_new_tx_setting function,
  to simplify coding;
- Optimize the location of assignment for 'timing_changed' in msdc_set_mclk
  function.

Changes in v2:
- Use compatible string 'mediatek,mt8196-mmc' to replace 'mediatek,msdc-v2';
- Remove the 'mediatek,stop-dly-sel', 'mediatek,pop-en-cnt' and 'mediatek,
  prohibit-gate-cg' in devicetree bindings, due to SoC dependent;
- Add 'stop_dly_sel' and 'pop_en_cnt' to the compatiblity structure for
  different register settings;
- The SoC's upgraded version would discard the bus design that detect source
  clock CG when the CPU access the IP registers, so drop the related control
  flow with 'prohibit_gate_cg' flag.

Link to v1:
https://patchwork.kernel.org/patch/13812924

---
Andy-ld Lu (3):
  mmc: mtk-sd: Add support for MT8196
  mmc: mtk-sd: Add two settings in platdata
  dt-bindings: mmc: mtk-sd: Add support for MT8196

 .../devicetree/bindings/mmc/mtk-sd.yaml       |   2 +
 drivers/mmc/host/mtk-sd.c                     | 166 +++++++++++++++---
 2 files changed, 147 insertions(+), 21 deletions(-)

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2.46.0