The STM32MP25 SOC has capability to behave in device mode however
missing .has_device_mode within its stm32mp25_spi_cfg structure leads
to not being able to enable the device mode.

Fixes: a4e7908abf0c ("spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 soc")
Cc: stable@vger.kernel.org
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
---
 drivers/spi/spi-stm32.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index f2dd8ab12df831d54758d21ec1a68ffc40e2f0a6..da3517d7102dce5f830cdf0dbdee3e19184f69c5 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -2044,6 +2044,7 @@ static const struct stm32_spi_cfg stm32mp25_spi_cfg = {
 	.baud_rate_div_max = STM32H7_SPI_MBR_DIV_MAX,
 	.has_fifo = true,
 	.prevent_dma_burst = true,
+	.has_device_mode = true,
 };
 
 static const struct of_device_id stm32_spi_of_match[] = {

---
base-commit: c2a59c892f20379a3e48124a83491a12374cd7e0
change-id: 20241009-spi-mp25-device-fix-e03406280c02

Best regards,
-- 
Alain Volmat <alain.volmat@foss.st.com>

On Wed, 09 Oct 2024 18:15:52 +0200, Alain Volmat wrote:
> The STM32MP25 SOC has capability to behave in device mode however
> missing .has_device_mode within its stm32mp25_spi_cfg structure leads
> to not being able to enable the device mode.
> 
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/1] spi: stm32: fix missing device mode capability in stm32mp25
      commit: b5a468199b995bd8ee3c26f169a416a181210c9e

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

On Wed, Oct 09, 2024 at 06:15:52PM +0200, Alain Volmat wrote:

> Fixes: a4e7908abf0c ("spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 soc")
> Cc: stable@vger.kernel.org

That SHA1 doesn't exist...

Hi Mark,

On Wed, Oct 09, 2024 at 05:29:28PM +0100, Mark Brown wrote:
> On Wed, Oct 09, 2024 at 06:15:52PM +0200, Alain Volmat wrote:
> 
> > Fixes: a4e7908abf0c ("spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 soc")
> > Cc: stable@vger.kernel.org
> 
> That SHA1 doesn't exist...

Oups, sorry about that.  Sending a v2 with correct SHA1.

Regards,
Alain