[PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN

David Lechner posted 2 patches 1 month, 2 weeks ago
drivers/pwm/pwm-axi-pwmgen.c | 24 ++++++++++++++++++------
1 file changed, 18 insertions(+), 6 deletions(-)
[PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN
Posted by David Lechner 1 month, 2 weeks ago
When using the axi-pwmgen as a trigger for ADCs, we've found that the
default behavior of the PWMGEN IP block is not ideal. The default
behavior is to wait for the period of all PWM outputs to run out before
applying any new settings. But there isn't a way to block until this
happens (and even if there was, it could take a long time). So the
pwm apply function returns before the new settings are actually applied.

This makes certain use cases impossible. For example, to use the PWM
like a GPIO to create a single pulse on and off to trigger a single ADC
conversion.

The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the
behavior so that any new output settings (period, duty cycle, etc.) are
applied immediately. This can cause glitches in the output, but makes
the PWM actually useable for most applications.

Also, there was a naming conflict with register names, so there is a
preliminary cleanup patch to sort that out.

---
David Lechner (2):
      pwm: axi-pwmgen: rename 0x10 register
      pwm: axi-pwmgen: enable FORCE_ALIGN by default

 drivers/pwm/pwm-axi-pwmgen.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)
---
base-commit: ff25451372ee1aa4c4f4401dc96516782a00dd4d
change-id: 20241009-pwm-axi-pwmgen-enable-force_align-cfb403da4612

Best regards,
-- 
David Lechner <dlechner@baylibre.com>
Re: [PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN
Posted by Uwe Kleine-König 1 month, 2 weeks ago
Hello David,

On Wed, Oct 09, 2024 at 04:11:48PM -0500, David Lechner wrote:
> When using the axi-pwmgen as a trigger for ADCs, we've found that the
> default behavior of the PWMGEN IP block is not ideal. The default
> behavior is to wait for the period of all PWM outputs to run out before
> applying any new settings. But there isn't a way to block until this
> happens (and even if there was, it could take a long time). So the
> pwm apply function returns before the new settings are actually applied.
> 
> This makes certain use cases impossible. For example, to use the PWM
> like a GPIO to create a single pulse on and off to trigger a single ADC
> conversion.
> 
> The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the
> behavior so that any new output settings (period, duty cycle, etc.) are
> applied immediately. This can cause glitches in the output, but makes
> the PWM actually useable for most applications.
> 
> Also, there was a naming conflict with register names, so there is a
> preliminary cleanup patch to sort that out.

Applied with Nuno's review-tag.

Thanks
Uwe
Re: [PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN
Posted by Nuno Sá 1 month, 2 weeks ago
On Wed, 2024-10-09 at 16:11 -0500, David Lechner wrote:
> When using the axi-pwmgen as a trigger for ADCs, we've found that the
> default behavior of the PWMGEN IP block is not ideal. The default
> behavior is to wait for the period of all PWM outputs to run out before
> applying any new settings. But there isn't a way to block until this
> happens (and even if there was, it could take a long time). So the
> pwm apply function returns before the new settings are actually applied.
> 
> This makes certain use cases impossible. For example, to use the PWM
> like a GPIO to create a single pulse on and off to trigger a single ADC
> conversion.
> 
> The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the
> behavior so that any new output settings (period, duty cycle, etc.) are
> applied immediately. This can cause glitches in the output, but makes
> the PWM actually useable for most applications.
> 
> Also, there was a naming conflict with register names, so there is a
> preliminary cleanup patch to sort that out.
> 
> ---

Reviewed-by: Nuno Sa <nuno.sa@analog.com>

> David Lechner (2):
>       pwm: axi-pwmgen: rename 0x10 register
>       pwm: axi-pwmgen: enable FORCE_ALIGN by default
> 
>  drivers/pwm/pwm-axi-pwmgen.c | 24 ++++++++++++++++++------
>  1 file changed, 18 insertions(+), 6 deletions(-)
> ---
> base-commit: ff25451372ee1aa4c4f4401dc96516782a00dd4d
> change-id: 20241009-pwm-axi-pwmgen-enable-force_align-cfb403da4612
> 
> Best regards,
Re: [PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN
Posted by Uwe Kleine-König 1 month, 2 weeks ago
On Thu, Oct 10, 2024 at 10:33:20AM +0200, Nuno Sá wrote:
> On Wed, 2024-10-09 at 16:11 -0500, David Lechner wrote:
> > When using the axi-pwmgen as a trigger for ADCs, we've found that the
> > default behavior of the PWMGEN IP block is not ideal. The default
> > behavior is to wait for the period of all PWM outputs to run out before
> > applying any new settings. But there isn't a way to block until this
> > happens (and even if there was, it could take a long time). So the
> > pwm apply function returns before the new settings are actually applied.
> > 
> > This makes certain use cases impossible. For example, to use the PWM
> > like a GPIO to create a single pulse on and off to trigger a single ADC
> > conversion.
> > 
> > The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the
> > behavior so that any new output settings (period, duty cycle, etc.) are
> > applied immediately. This can cause glitches in the output, but makes
> > the PWM actually useable for most applications.
> > 
> > Also, there was a naming conflict with register names, so there is a
> > preliminary cleanup patch to sort that out.
> > 
> > ---
> 
> Reviewed-by: Nuno Sa <nuno.sa@analog.com>

b4 diagnoses for that:
NOTE: some trailers ignored due to from/email mismatches:
    ! Trailer: Reviewed-by: Nuno Sa <nuno.sa@analog.com>
     Msg From: Nuno Sá <noname.nuno@gmail.com>

I fixed that manually now, but would be nice if you'd care for matching
addresses in the future.

Best regards
Uwe
Re: [PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN
Posted by Nuno Sá 1 month, 2 weeks ago
On Fri, 2024-10-11 at 11:51 +0200, Uwe Kleine-König wrote:
> On Thu, Oct 10, 2024 at 10:33:20AM +0200, Nuno Sá wrote:
> > On Wed, 2024-10-09 at 16:11 -0500, David Lechner wrote:
> > > When using the axi-pwmgen as a trigger for ADCs, we've found that the
> > > default behavior of the PWMGEN IP block is not ideal. The default
> > > behavior is to wait for the period of all PWM outputs to run out before
> > > applying any new settings. But there isn't a way to block until this
> > > happens (and even if there was, it could take a long time). So the
> > > pwm apply function returns before the new settings are actually applied.
> > > 
> > > This makes certain use cases impossible. For example, to use the PWM
> > > like a GPIO to create a single pulse on and off to trigger a single ADC
> > > conversion.
> > > 
> > > The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the
> > > behavior so that any new output settings (period, duty cycle, etc.) are
> > > applied immediately. This can cause glitches in the output, but makes
> > > the PWM actually useable for most applications.
> > > 
> > > Also, there was a naming conflict with register names, so there is a
> > > preliminary cleanup patch to sort that out.
> > > 
> > > ---
> > 
> > Reviewed-by: Nuno Sa <nuno.sa@analog.com>
> 
> b4 diagnoses for that:
> NOTE: some trailers ignored due to from/email mismatches:
>     ! Trailer: Reviewed-by: Nuno Sa <nuno.sa@analog.com>
>      Msg From: Nuno Sá <noname.nuno@gmail.com>
> 
> I fixed that manually now, but would be nice if you'd care for matching
> addresses in the future.
> 
> 

Arghh,

Completely forgot... As i said in the first time, I'm doing this all the time
and never got a complain about it. I'll try to remember for pwm to reply from my
work email client (which I want to avoid for mailing lists as you might guess
the client I'm speaking about).

- Nuno Sá