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[PATCH v2 1/3] dt-bindings: spi: Add realtek,rtl9300-snand

Chris Packham posted 3 patches 1 month, 2 weeks ago
There is a newer version of this series
[PATCH v2 1/3] dt-bindings: spi: Add realtek,rtl9300-snand
Posted by Chris Packham 1 month, 2 weeks ago 
Add a dtschema for the SPI-NAND controller on the RTL9300 SoCs. The
controller supports
 * Serial/Dual/Quad data with
 * PIO and DMA data read/write operation
 * Configurable flash access timing

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    Changes in v2:
    - Add clocks
    - For now I've kept realtek,rtl9300-snand to identify the IP block used
      in the various rtl930x chips. If the consensus is to drop this I can
      send a v3 with an updated driver to add the chip specific complatibles.

 .../bindings/spi/realtek,rtl9300-snand.yaml   | 69 +++++++++++++++++++
 1 file changed, 69 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml

diff --git a/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
new file mode 100644
index 000000000000..2d01464e85e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/realtek,rtl9300-snand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SPI-NAND Flash Controller for Realtek RTL9300 SoCs
+
+maintainers:
+  - Chris Packham <chris.packham@alliedtelesis.co.nz>
+
+description:
+  The Realtek RTL9300 SoCs have a built in SPI-NAND controller. It supports
+  typical SPI-NAND page cache operations in single, dual or quad IO mode.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - realtek,rtl9301-snand
+          - realtek,rtl9302b-snand
+          - realtek,rtl9302c-snand
+          - realtek,rtl9303-snand
+      - const: realtek,rtl9300-snand
+
+  reg:
+    items:
+      - description: SPI NAND controller registers address and size
+
+  interrupts:
+    items:
+      - description: SPI NAND controller interrupt
+
+  clocks:
+    items:
+      - description: SPI NAND controller reference clock
+
+  clock-names:
+    items:
+      - const: spi
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+allOf:
+  - $ref: /schemas/spi/spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    spi@1a400 {
+      compatible = "realtek,rtl9302c-snand", "realtek,rtl9300-snand";
+      reg = <0x1a400 0x44>;
+      interrupt-parent = <&intc>;
+      interrupts = <19>;
+      clocks = <&lx_clk>;
+      clock-names = "spi";
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      flash@0 {
+        compatible = "spi-nand";
+        reg = <0>;
+      };
+    };
-- 
2.46.2
Re: [PATCH v2 1/3] dt-bindings: spi: Add realtek,rtl9300-snand
Posted by Rob Herring 1 month, 2 weeks ago 
On Tue, Oct 08, 2024 at 01:23:05PM +1300, Chris Packham wrote:
> Add a dtschema for the SPI-NAND controller on the RTL9300 SoCs. The
> controller supports
>  * Serial/Dual/Quad data with
>  * PIO and DMA data read/write operation
>  * Configurable flash access timing
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> 
> Notes:
>     Changes in v2:
>     - Add clocks
>     - For now I've kept realtek,rtl9300-snand to identify the IP block used
>       in the various rtl930x chips. If the consensus is to drop this I can
>       send a v3 with an updated driver to add the chip specific complatibles.
> 
>  .../bindings/spi/realtek,rtl9300-snand.yaml   | 69 +++++++++++++++++++
>  1 file changed, 69 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> new file mode 100644
> index 000000000000..2d01464e85e5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/realtek,rtl9300-snand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI-NAND Flash Controller for Realtek RTL9300 SoCs
> +
> +maintainers:
> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
> +
> +description:
> +  The Realtek RTL9300 SoCs have a built in SPI-NAND controller. It supports
> +  typical SPI-NAND page cache operations in single, dual or quad IO mode.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - realtek,rtl9301-snand
> +          - realtek,rtl9302b-snand
> +          - realtek,rtl9302c-snand
> +          - realtek,rtl9303-snand
> +      - const: realtek,rtl9300-snand
> +
> +  reg:
> +    items:
> +      - description: SPI NAND controller registers address and size

Just 'maxItems: 1'. The description is fairly obvious.

> +
> +  interrupts:
> +    items:
> +      - description: SPI NAND controller interrupt

Same here.

> +
> +  clocks:
> +    items:
> +      - description: SPI NAND controller reference clock

And here.

> +
> +  clock-names:
> +    items:
> +      - const: spi
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +allOf:
> +  - $ref: /schemas/spi/spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    spi@1a400 {
> +      compatible = "realtek,rtl9302c-snand", "realtek,rtl9300-snand";
> +      reg = <0x1a400 0x44>;
> +      interrupt-parent = <&intc>;
> +      interrupts = <19>;
> +      clocks = <&lx_clk>;
> +      clock-names = "spi";
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +
> +      flash@0 {
> +        compatible = "spi-nand";
> +        reg = <0>;
> +      };
> +    };
> -- 
> 2.46.2
>
Re: [PATCH v2 1/3] dt-bindings: spi: Add realtek,rtl9300-snand
Posted by Krzysztof Kozlowski 1 month, 2 weeks ago 
On Tue, Oct 08, 2024 at 01:23:05PM +1300, Chris Packham wrote:
> Add a dtschema for the SPI-NAND controller on the RTL9300 SoCs. The
> controller supports
>  * Serial/Dual/Quad data with
>  * PIO and DMA data read/write operation
>  * Configurable flash access timing
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> 
> Notes:
>     Changes in v2:
>     - Add clocks
>     - For now I've kept realtek,rtl9300-snand to identify the IP block used
>       in the various rtl930x chips. If the consensus is to drop this I can
>       send a v3 with an updated driver to add the chip specific complatibles.
> 
>  .../bindings/spi/realtek,rtl9300-snand.yaml   | 69 +++++++++++++++++++
>  1 file changed, 69 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> new file mode 100644
> index 000000000000..2d01464e85e5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/realtek,rtl9300-snand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI-NAND Flash Controller for Realtek RTL9300 SoCs
> +
> +maintainers:
> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
> +
> +description:
> +  The Realtek RTL9300 SoCs have a built in SPI-NAND controller. It supports
> +  typical SPI-NAND page cache operations in single, dual or quad IO mode.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - realtek,rtl9301-snand
> +          - realtek,rtl9302b-snand
> +          - realtek,rtl9302c-snand
> +          - realtek,rtl9303-snand
> +      - const: realtek,rtl9300-snand

Drop 9300, unless it is a final product but then it should be allowed
standalone.

And yeah, it's total mess for other "Realtek Otto" bindings because no
one develops it in cohesive way and no one provides full picture to us
for review.

> +
> +  reg:
> +    items:
> +      - description: SPI NAND controller registers address and size
> +
> +  interrupts:
> +    items:
> +      - description: SPI NAND controller interrupt
> +
> +  clocks:
> +    items:
> +      - description: SPI NAND controller reference clock
> +
> +  clock-names:
> +    items:
> +      - const: spi

Drop clock-names.

Best regards,
Krzysztof

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