drivers/soc/mediatek/mtk-pmic-wrap.c | 33 ++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)
MT8188 are highly integrated SoC and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Sen Chu <sen.chu@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 33 ++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 9fdc0ef79202..5d3c90e32067 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -1087,6 +1087,23 @@ static const int mt8183_regs[] = {
[PWRAP_WACS2_VLDCLR] = 0xC28,
};
+static int mt8188_regs[] = {
+ [PWRAP_INIT_DONE2] = 0x0,
+ [PWRAP_STAUPD_CTRL] = 0x4C,
+ [PWRAP_TIMER_EN] = 0x3E4,
+ [PWRAP_INT_EN] = 0x420,
+ [PWRAP_INT_FLG] = 0x428,
+ [PWRAP_INT_CLR] = 0x42C,
+ [PWRAP_INT1_EN] = 0x450,
+ [PWRAP_INT1_FLG] = 0x458,
+ [PWRAP_INT1_CLR] = 0x45C,
+ [PWRAP_WACS2_CMD] = 0x880,
+ [PWRAP_SWINF_2_WDATA_31_0] = 0x884,
+ [PWRAP_SWINF_2_RDATA_31_0] = 0x894,
+ [PWRAP_WACS2_VLDCLR] = 0x8A4,
+ [PWRAP_WACS2_RDATA] = 0x8A8,
+};
+
static const int mt8195_regs[] = {
[PWRAP_INIT_DONE2] = 0x0,
[PWRAP_STAUPD_CTRL] = 0x4C,
@@ -1324,6 +1341,7 @@ enum pwrap_type {
PWRAP_MT8173,
PWRAP_MT8183,
PWRAP_MT8186,
+ PWRAP_MT8188,
PWRAP_MT8195,
PWRAP_MT8365,
PWRAP_MT8516,
@@ -1845,6 +1863,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT6797:
case PWRAP_MT8173:
case PWRAP_MT8186:
+ case PWRAP_MT8188:
case PWRAP_MT8365:
case PWRAP_MT8516:
pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
@@ -2393,6 +2412,19 @@ static const struct pmic_wrapper_type pwrap_mt8183 = {
.init_soc_specific = pwrap_mt8183_init_soc_specific,
};
+static struct pmic_wrapper_type pwrap_mt8188 = {
+ .regs = mt8188_regs,
+ .type = PWRAP_MT8188,
+ .arb_en_all = 0x777f,
+ .int_en_all = 0x180000,
+ .int1_en_all = 0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_ARB,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt8195 = {
.regs = mt8195_regs,
.type = PWRAP_MT8195,
@@ -2456,6 +2488,7 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
{ .compatible = "mediatek,mt8173-pwrap", .data = &pwrap_mt8173 },
{ .compatible = "mediatek,mt8183-pwrap", .data = &pwrap_mt8183 },
{ .compatible = "mediatek,mt8186-pwrap", .data = &pwrap_mt8186 },
+ { .compatible = "mediatek,mt8188-pwrap", .data = &pwrap_mt8188 },
{ .compatible = "mediatek,mt8195-pwrap", .data = &pwrap_mt8195 },
{ .compatible = "mediatek,mt8365-pwrap", .data = &pwrap_mt8365 },
{ .compatible = "mediatek,mt8516-pwrap", .data = &pwrap_mt8516 },
--
2.45.2
Il 07/10/24 04:43, Macpaul Lin ha scritto: > MT8188 are highly integrated SoC and use PMIC_MT6359 for > power management. This patch adds pwrap master driver to > access PMIC_MT6359. > > Signed-off-by: Sen Chu <sen.chu@mediatek.com> > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Actually, MT8188 and MT8195's pwrap registers and code flow are exactly the same: since they are, we don't need this commit (or we don't need it right now!), and we can just update the binding so that we can declare... compatible = "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap", "syscon"; ...hence this driver doesn't get any commit :-) Cheers, Angelo
On Mon, Oct 7, 2024 at 10:55 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Il 07/10/24 04:43, Macpaul Lin ha scritto:
> > MT8188 are highly integrated SoC and use PMIC_MT6359 for
> > power management. This patch adds pwrap master driver to
> > access PMIC_MT6359.
> >
> > Signed-off-by: Sen Chu <sen.chu@mediatek.com>
> > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
>
> Actually, MT8188 and MT8195's pwrap registers and code flow are exactly the same:
> since they are, we don't need this commit (or we don't need it right now!), and
> we can just update the binding so that we can declare...
>
> compatible = "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap", "syscon";
>
> ...hence this driver doesn't get any commit :-)
... which is already the case. :)
See commit 040c3303f110 ("dt-bindings: soc: mediatek: pwrap: Modify
compatible for MT8188").
And the device tree is set as well, so it's all good for MT8188 I believe.
Cheers,
Fei
On 10/7/24 23:23, Fei Shao wrote:
>
>
> External email : Please do not click links or open attachments until you
> have verified the sender or the content.
>
> On Mon, Oct 7, 2024 at 10:55 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> Il 07/10/24 04:43, Macpaul Lin ha scritto:
>> > MT8188 are highly integrated SoC and use PMIC_MT6359 for
>> > power management. This patch adds pwrap master driver to
>> > access PMIC_MT6359.
>> >
>> > Signed-off-by: Sen Chu <sen.chu@mediatek.com>
>> > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
>>
>> Actually, MT8188 and MT8195's pwrap registers and code flow are exactly the same:
>> since they are, we don't need this commit (or we don't need it right now!), and
>> we can just update the binding so that we can declare...
>>
>> compatible = "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap", "syscon";
>>
>> ...hence this driver doesn't get any commit :-)
>
> ... which is already the case. :)
> See commit 040c3303f110 ("dt-bindings: soc: mediatek: pwrap: Modify
> compatible for MT8188").
> And the device tree is set as well, so it's all good for MT8188 I believe.
>
> Cheers,
> Fei
>
Oh. Thank you for the reminder and point out the related commits.
Then this patch could be dropped.
Thanks!
Macpaul Lin
On 07/10/2024 04:43, Macpaul Lin wrote:
> MT8188 are highly integrated SoC and use PMIC_MT6359 for
> power management. This patch adds pwrap master driver to
> access PMIC_MT6359.
>
> Signed-off-by: Sen Chu <sen.chu@mediatek.com>
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 33 ++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 9fdc0ef79202..5d3c90e32067 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -1087,6 +1087,23 @@ static const int mt8183_regs[] = {
> [PWRAP_WACS2_VLDCLR] = 0xC28,
> };
>
> +static int mt8188_regs[] = {
> + [PWRAP_INIT_DONE2] = 0x0,
> + [PWRAP_STAUPD_CTRL] = 0x4C,
> + [PWRAP_TIMER_EN] = 0x3E4,
> + [PWRAP_INT_EN] = 0x420,
> + [PWRAP_INT_FLG] = 0x428,
> + [PWRAP_INT_CLR] = 0x42C,
> + [PWRAP_INT1_EN] = 0x450,
> + [PWRAP_INT1_FLG] = 0x458,
> + [PWRAP_INT1_CLR] = 0x45C,
> + [PWRAP_WACS2_CMD] = 0x880,
> + [PWRAP_SWINF_2_WDATA_31_0] = 0x884,
> + [PWRAP_SWINF_2_RDATA_31_0] = 0x894,
> + [PWRAP_WACS2_VLDCLR] = 0x8A4,
> + [PWRAP_WACS2_RDATA] = 0x8A8,
> +};
> +
> static const int mt8195_regs[] = {
> [PWRAP_INIT_DONE2] = 0x0,
> [PWRAP_STAUPD_CTRL] = 0x4C,
> @@ -1324,6 +1341,7 @@ enum pwrap_type {
> PWRAP_MT8173,
> PWRAP_MT8183,
> PWRAP_MT8186,
> + PWRAP_MT8188,
> PWRAP_MT8195,
> PWRAP_MT8365,
> PWRAP_MT8516,
> @@ -1845,6 +1863,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> case PWRAP_MT6797:
> case PWRAP_MT8173:
> case PWRAP_MT8186:
> + case PWRAP_MT8188:
> case PWRAP_MT8365:
> case PWRAP_MT8516:
> pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> @@ -2393,6 +2412,19 @@ static const struct pmic_wrapper_type pwrap_mt8183 = {
> .init_soc_specific = pwrap_mt8183_init_soc_specific,
> };
>
> +static struct pmic_wrapper_type pwrap_mt8188 = {
> + .regs = mt8188_regs,
> + .type = PWRAP_MT8188,
> + .arb_en_all = 0x777f,
> + .int_en_all = 0x180000,
> + .int1_en_all = 0,
> + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> + .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_ARB,
> + .init_reg_clock = pwrap_common_init_reg_clock,
> + .init_soc_specific = NULL,
> +};
> +
> static const struct pmic_wrapper_type pwrap_mt8195 = {
> .regs = mt8195_regs,
> .type = PWRAP_MT8195,
> @@ -2456,6 +2488,7 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> { .compatible = "mediatek,mt8173-pwrap", .data = &pwrap_mt8173 },
> { .compatible = "mediatek,mt8183-pwrap", .data = &pwrap_mt8183 },
> { .compatible = "mediatek,mt8186-pwrap", .data = &pwrap_mt8186 },
> + { .compatible = "mediatek,mt8188-pwrap", .data = &pwrap_mt8188 },
> { .compatible = "mediatek,mt8195-pwrap", .data = &pwrap_mt8195 },
> { .compatible = "mediatek,mt8365-pwrap", .data = &pwrap_mt8365 },
> { .compatible = "mediatek,mt8516-pwrap", .data = &pwrap_mt8516 },
On 07/10/2024 04:43, Macpaul Lin wrote:
> MT8188 are highly integrated SoC and use PMIC_MT6359 for
> power management. This patch adds pwrap master driver to
> access PMIC_MT6359.
>
> Signed-off-by: Sen Chu <sen.chu@mediatek.com>
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 33 ++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 9fdc0ef79202..5d3c90e32067 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -1087,6 +1087,23 @@ static const int mt8183_regs[] = {
> [PWRAP_WACS2_VLDCLR] = 0xC28,
> };
>
> +static int mt8188_regs[] = {
> + [PWRAP_INIT_DONE2] = 0x0,
> + [PWRAP_STAUPD_CTRL] = 0x4C,
> + [PWRAP_TIMER_EN] = 0x3E4,
> + [PWRAP_INT_EN] = 0x420,
> + [PWRAP_INT_FLG] = 0x428,
> + [PWRAP_INT_CLR] = 0x42C,
> + [PWRAP_INT1_EN] = 0x450,
> + [PWRAP_INT1_FLG] = 0x458,
> + [PWRAP_INT1_CLR] = 0x45C,
> + [PWRAP_WACS2_CMD] = 0x880,
> + [PWRAP_SWINF_2_WDATA_31_0] = 0x884,
> + [PWRAP_SWINF_2_RDATA_31_0] = 0x894,
> + [PWRAP_WACS2_VLDCLR] = 0x8A4,
> + [PWRAP_WACS2_RDATA] = 0x8A8,
> +};
> +
> static const int mt8195_regs[] = {
> [PWRAP_INIT_DONE2] = 0x0,
> [PWRAP_STAUPD_CTRL] = 0x4C,
> @@ -1324,6 +1341,7 @@ enum pwrap_type {
> PWRAP_MT8173,
> PWRAP_MT8183,
> PWRAP_MT8186,
> + PWRAP_MT8188,
> PWRAP_MT8195,
> PWRAP_MT8365,
> PWRAP_MT8516,
> @@ -1845,6 +1863,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> case PWRAP_MT6797:
> case PWRAP_MT8173:
> case PWRAP_MT8186:
> + case PWRAP_MT8188:
> case PWRAP_MT8365:
> case PWRAP_MT8516:
> pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> @@ -2393,6 +2412,19 @@ static const struct pmic_wrapper_type pwrap_mt8183 = {
> .init_soc_specific = pwrap_mt8183_init_soc_specific,
> };
>
> +static struct pmic_wrapper_type pwrap_mt8188 = {
> + .regs = mt8188_regs,
> + .type = PWRAP_MT8188,
> + .arb_en_all = 0x777f,
> + .int_en_all = 0x180000,
> + .int1_en_all = 0,
> + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> + .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_ARB,
> + .init_reg_clock = pwrap_common_init_reg_clock,
> + .init_soc_specific = NULL,
> +};
> +
> static const struct pmic_wrapper_type pwrap_mt8195 = {
> .regs = mt8195_regs,
> .type = PWRAP_MT8195,
> @@ -2456,6 +2488,7 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> { .compatible = "mediatek,mt8173-pwrap", .data = &pwrap_mt8173 },
> { .compatible = "mediatek,mt8183-pwrap", .data = &pwrap_mt8183 },
> { .compatible = "mediatek,mt8186-pwrap", .data = &pwrap_mt8186 },
> + { .compatible = "mediatek,mt8188-pwrap", .data = &pwrap_mt8188 },
> { .compatible = "mediatek,mt8195-pwrap", .data = &pwrap_mt8195 },
> { .compatible = "mediatek,mt8365-pwrap", .data = &pwrap_mt8365 },
> { .compatible = "mediatek,mt8516-pwrap", .data = &pwrap_mt8516 },
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