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[PATCH v2 2/2] phy: usb: update Broadcom driver table to use designated initializers

Sam Edwards posted 2 patches 1 month, 3 weeks ago
[PATCH v2 2/2] phy: usb: update Broadcom driver table to use designated initializers
Posted by Sam Edwards 1 month, 3 weeks ago 
The Broadcom USB PHY driver contains a lookup table
(`reg_bits_map_tables`) to resolve register bitmaps unique to certain
versions of the USB PHY as found in various Broadcom chip families.
Historically, this table was just kept carefully in sync with the
"selector" enum every time the latter changed to ensure consistency.
However, a recent commit [1] introduced two new enumerators but did not
adjust the array for BCM4908, thus breaking the xHCI controller (and
boot process) on this platform and revealing the fragility of this
approach.

Since these arrays are a little sparse (many elements are zero) and the
position of the array elements is significant only insofar as they agree
with the enumerators, designated initializers are a better fit than
positional initializers here. Convert this table accordingly.

[1] 4536fe9640b6 ("phy: usb: suppress OC condition for 7439b2")

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
---
 drivers/phy/broadcom/phy-brcm-usb-init.c | 435 +++++++++++------------
 1 file changed, 215 insertions(+), 220 deletions(-)

diff --git a/drivers/phy/broadcom/phy-brcm-usb-init.c b/drivers/phy/broadcom/phy-brcm-usb-init.c
index 5ebb3a616115..da23078878a9 100644
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -193,256 +193,251 @@ static const u32
 usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
 	/* 3390B0 */
 	[BRCM_FAMILY_3390A0] = {
-		USB_CTRL_SETUP_SCB1_EN_MASK,
-		USB_CTRL_SETUP_SCB2_EN_MASK,
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
-		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
-		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_USB_PWRDN_MASK,
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB1_EN_MASK,
+		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB2_EN_MASK,
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
+		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
+			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
+			USB_CTRL_USB_PM_USB_PWRDN_MASK,
+		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
+			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 4908 */
 	[BRCM_FAMILY_4908] = {
-		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
-		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
-		0, /* USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
-		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */
-		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */
-		0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */
-		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
-		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_USB_PWRDN_MASK,
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK */
-		0, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
+			USB_CTRL_USB_PM_USB_PWRDN_MASK,
 	},
 	/* 7250b0 */
 	[BRCM_FAMILY_7250B0] = {
-		USB_CTRL_SETUP_SCB1_EN_MASK,
-		USB_CTRL_SETUP_SCB2_EN_MASK,
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
-		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
-		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
-		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB1_EN_MASK,
+		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB2_EN_MASK,
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
+			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 7271a0 */
 	[BRCM_FAMILY_7271A0] = {
-		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
-		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
-		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
-		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_USB_PWRDN_MASK,
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
-		USB_CTRL_USB_PM_SOFT_RESET_MASK,
-		USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
-		USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
-		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
+		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
+			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
+			USB_CTRL_USB_PM_USB_PWRDN_MASK,
+		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
+			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
+		[USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] =
+			USB_CTRL_USB_PM_SOFT_RESET_MASK,
+		[USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] =
+			USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
+		[USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] =
+			USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 7364a0 */
 	[BRCM_FAMILY_7364A0] = {
-		USB_CTRL_SETUP_SCB1_EN_MASK,
-		USB_CTRL_SETUP_SCB2_EN_MASK,
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
-		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
-		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
-		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB1_EN_MASK,
+		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB2_EN_MASK,
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
+			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 7366c0 */
 	[BRCM_FAMILY_7366C0] = {
-		USB_CTRL_SETUP_SCB1_EN_MASK,
-		USB_CTRL_SETUP_SCB2_EN_MASK,
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
-		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
-		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
-		USB_CTRL_USB_PM_USB_PWRDN_MASK,
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB1_EN_MASK,
+		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB2_EN_MASK,
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
+		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
+			USB_CTRL_USB_PM_USB_PWRDN_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 74371A0 */
 	[BRCM_FAMILY_74371A0] = {
-		USB_CTRL_SETUP_SCB1_EN_MASK,
-		USB_CTRL_SETUP_SCB2_EN_MASK,
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
-		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
-		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */
-		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */
-		0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */
-		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
-		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
-		USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
-		USB_CTRL_USB30_CTL1_USB3_IOC_MASK,
-		USB_CTRL_USB30_CTL1_USB3_IPP_MASK,
-		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB1_EN_MASK,
+		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB2_EN_MASK,
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
+		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
+			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+		[USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB30_CTL1_USB3_IOC_SELECTOR] =
+			USB_CTRL_USB30_CTL1_USB3_IOC_MASK,
+		[USB_CTRL_USB30_CTL1_USB3_IPP_SELECTOR] =
+			USB_CTRL_USB30_CTL1_USB3_IPP_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 7439B0 */
 	[BRCM_FAMILY_7439B0] = {
-		USB_CTRL_SETUP_SCB1_EN_MASK,
-		USB_CTRL_SETUP_SCB2_EN_MASK,
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
-		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
-		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_USB_PWRDN_MASK,
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB1_EN_MASK,
+		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB2_EN_MASK,
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
+		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
+			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
+			USB_CTRL_USB_PM_USB_PWRDN_MASK,
+		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
+			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 7445d0 */
 	[BRCM_FAMILY_7445D0] = {
-		USB_CTRL_SETUP_SCB1_EN_MASK,
-		USB_CTRL_SETUP_SCB2_EN_MASK,
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
-		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
-		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
-		USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
-		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB1_EN_MASK,
+		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
+			USB_CTRL_SETUP_SCB2_EN_MASK,
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
+			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+		[USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 7260a0 */
 	[BRCM_FAMILY_7260A0] = {
-		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
-		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
-		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
-		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
-		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_USB_PWRDN_MASK,
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
-		USB_CTRL_USB_PM_SOFT_RESET_MASK,
-		USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
-		USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
-		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
-		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
+			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
+		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
+			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
+			USB_CTRL_USB_PM_USB_PWRDN_MASK,
+		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
+			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
+		[USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] =
+			USB_CTRL_USB_PM_SOFT_RESET_MASK,
+		[USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] =
+			USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
+		[USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] =
+			USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
+		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
+		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
 	},
 	/* 7278a0 */
 	[BRCM_FAMILY_7278A0] = {
-		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
-		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
-		0, /*USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */
-		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
-		USB_CTRL_SETUP_OC3_DISABLE_MASK,
-		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
-		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
-		USB_CTRL_USB_PM_USB_PWRDN_MASK,
-		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
-		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
-		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
-		USB_CTRL_USB_PM_SOFT_RESET_MASK,
-		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
-		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
-		0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */
-		0, /* USB_CTRL_SETUP ENDIAN bits */
+		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
+			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
+		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
+			USB_CTRL_SETUP_OC3_DISABLE_MASK,
+		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
+			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
+			USB_CTRL_USB_PM_USB_PWRDN_MASK,
+		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
+			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
+		[USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] =
+			USB_CTRL_USB_PM_SOFT_RESET_MASK,
 	},
 };
 
-- 
2.44.2
Re: [PATCH v2 2/2] phy: usb: update Broadcom driver table to use designated initializers
Posted by Justin Chen 1 month, 3 weeks ago 

On 10/3/24 8:41 PM, Sam Edwards wrote:
> The Broadcom USB PHY driver contains a lookup table
> (`reg_bits_map_tables`) to resolve register bitmaps unique to certain
> versions of the USB PHY as found in various Broadcom chip families.
> Historically, this table was just kept carefully in sync with the
> "selector" enum every time the latter changed to ensure consistency.
> However, a recent commit [1] introduced two new enumerators but did not
> adjust the array for BCM4908, thus breaking the xHCI controller (and
> boot process) on this platform and revealing the fragility of this
> approach.
> 
> Since these arrays are a little sparse (many elements are zero) and the
> position of the array elements is significant only insofar as they agree
> with the enumerators, designated initializers are a better fit than
> positional initializers here. Convert this table accordingly.
> 
> [1] 4536fe9640b6 ("phy: usb: suppress OC condition for 7439b2")
> 
> Signed-off-by: Sam Edwards <CFSworks@gmail.com>

Reviewed-by: Justin Chen <justin.chen@broadcom.com>

> ---
>   drivers/phy/broadcom/phy-brcm-usb-init.c | 435 +++++++++++------------
>   1 file changed, 215 insertions(+), 220 deletions(-)
> 
> diff --git a/drivers/phy/broadcom/phy-brcm-usb-init.c b/drivers/phy/broadcom/phy-brcm-usb-init.c
> index 5ebb3a616115..da23078878a9 100644
> --- a/drivers/phy/broadcom/phy-brcm-usb-init.c
> +++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
> @@ -193,256 +193,251 @@ static const u32
>   usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
>   	/* 3390B0 */
>   	[BRCM_FAMILY_3390A0] = {
> -		USB_CTRL_SETUP_SCB1_EN_MASK,
> -		USB_CTRL_SETUP_SCB2_EN_MASK,
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> -		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
> -		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_USB_PWRDN_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB1_EN_MASK,
> +		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB2_EN_MASK,
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> +		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
> +			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
> +			USB_CTRL_USB_PM_USB_PWRDN_MASK,
> +		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
> +			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 4908 */
>   	[BRCM_FAMILY_4908] = {
> -		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
> -		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
> -		0, /* USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
> -		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */
> -		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */
> -		0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */
> -		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
> -		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_USB_PWRDN_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK */
> -		0, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
> +			USB_CTRL_USB_PM_USB_PWRDN_MASK,
>   	},
>   	/* 7250b0 */
>   	[BRCM_FAMILY_7250B0] = {
> -		USB_CTRL_SETUP_SCB1_EN_MASK,
> -		USB_CTRL_SETUP_SCB2_EN_MASK,
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> -		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> -		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
> -		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB1_EN_MASK,
> +		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB2_EN_MASK,
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
> +			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 7271a0 */
>   	[BRCM_FAMILY_7271A0] = {
> -		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
> -		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> -		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
> -		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_USB_PWRDN_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> -		USB_CTRL_USB_PM_SOFT_RESET_MASK,
> -		USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
> -		USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> +		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
> +			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
> +			USB_CTRL_USB_PM_USB_PWRDN_MASK,
> +		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
> +			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> +		[USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] =
> +			USB_CTRL_USB_PM_SOFT_RESET_MASK,
> +		[USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] =
> +			USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
> +		[USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] =
> +			USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 7364a0 */
>   	[BRCM_FAMILY_7364A0] = {
> -		USB_CTRL_SETUP_SCB1_EN_MASK,
> -		USB_CTRL_SETUP_SCB2_EN_MASK,
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> -		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> -		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
> -		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB1_EN_MASK,
> +		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB2_EN_MASK,
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
> +			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 7366c0 */
>   	[BRCM_FAMILY_7366C0] = {
> -		USB_CTRL_SETUP_SCB1_EN_MASK,
> -		USB_CTRL_SETUP_SCB2_EN_MASK,
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> -		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
> -		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
> -		USB_CTRL_USB_PM_USB_PWRDN_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB1_EN_MASK,
> +		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB2_EN_MASK,
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
> +		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
> +			USB_CTRL_USB_PM_USB_PWRDN_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 74371A0 */
>   	[BRCM_FAMILY_74371A0] = {
> -		USB_CTRL_SETUP_SCB1_EN_MASK,
> -		USB_CTRL_SETUP_SCB2_EN_MASK,
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
> -		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
> -		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */
> -		0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */
> -		0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */
> -		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> -		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
> -		USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB30_CTL1_USB3_IOC_MASK,
> -		USB_CTRL_USB30_CTL1_USB3_IPP_MASK,
> -		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB1_EN_MASK,
> +		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB2_EN_MASK,
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
> +		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
> +			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> +		[USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB30_CTL1_USB3_IOC_SELECTOR] =
> +			USB_CTRL_USB30_CTL1_USB3_IOC_MASK,
> +		[USB_CTRL_USB30_CTL1_USB3_IPP_SELECTOR] =
> +			USB_CTRL_USB30_CTL1_USB3_IPP_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 7439B0 */
>   	[BRCM_FAMILY_7439B0] = {
> -		USB_CTRL_SETUP_SCB1_EN_MASK,
> -		USB_CTRL_SETUP_SCB2_EN_MASK,
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> -		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
> -		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_USB_PWRDN_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB1_EN_MASK,
> +		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB2_EN_MASK,
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> +		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
> +			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
> +			USB_CTRL_USB_PM_USB_PWRDN_MASK,
> +		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
> +			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 7445d0 */
>   	[BRCM_FAMILY_7445D0] = {
> -		USB_CTRL_SETUP_SCB1_EN_MASK,
> -		USB_CTRL_SETUP_SCB2_EN_MASK,
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
> -		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> -		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
> -		USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */
> -		0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SCB1_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB1_EN_MASK,
> +		[USB_CTRL_SETUP_SCB2_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SCB2_EN_MASK,
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] =
> +			USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
> +		[USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 7260a0 */
>   	[BRCM_FAMILY_7260A0] = {
> -		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
> -		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
> -		USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> -		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
> -		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_USB_PWRDN_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> -		USB_CTRL_USB_PM_SOFT_RESET_MASK,
> -		USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
> -		USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
> -		USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> -		ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] =
> +			USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
> +		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
> +			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
> +			USB_CTRL_USB_PM_USB_PWRDN_MASK,
> +		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
> +			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> +		[USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] =
> +			USB_CTRL_USB_PM_SOFT_RESET_MASK,
> +		[USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] =
> +			USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK,
> +		[USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] =
> +			USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK,
> +		[USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK,
> +		[USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS,
>   	},
>   	/* 7278a0 */
>   	[BRCM_FAMILY_7278A0] = {
> -		0, /* USB_CTRL_SETUP_SCB1_EN_MASK */
> -		0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
> -		0, /*USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */
> -		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> -		USB_CTRL_SETUP_OC3_DISABLE_MASK,
> -		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
> -		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> -		USB_CTRL_USB_PM_USB_PWRDN_MASK,
> -		0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */
> -		0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */
> -		USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> -		USB_CTRL_USB_PM_SOFT_RESET_MASK,
> -		0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */
> -		0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */
> -		0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */
> -		0, /* USB_CTRL_SETUP ENDIAN bits */
> +		[USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] =
> +			USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
> +		[USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] =
> +			USB_CTRL_SETUP_OC3_DISABLE_MASK,
> +		[USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] =
> +			USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
> +		[USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] =
> +			USB_CTRL_USB_PM_USB_PWRDN_MASK,
> +		[USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] =
> +			USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK,
> +		[USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] =
> +			USB_CTRL_USB_PM_SOFT_RESET_MASK,
>   	},
>   };
>
Re: [PATCH v2 2/2] phy: usb: update Broadcom driver table to use designated initializers
Posted by Florian Fainelli 1 month, 3 weeks ago 
On 10/3/24 20:41, Sam Edwards wrote:
> The Broadcom USB PHY driver contains a lookup table
> (`reg_bits_map_tables`) to resolve register bitmaps unique to certain
> versions of the USB PHY as found in various Broadcom chip families.
> Historically, this table was just kept carefully in sync with the
> "selector" enum every time the latter changed to ensure consistency.
> However, a recent commit [1] introduced two new enumerators but did not
> adjust the array for BCM4908, thus breaking the xHCI controller (and
> boot process) on this platform and revealing the fragility of this
> approach.
> 
> Since these arrays are a little sparse (many elements are zero) and the
> position of the array elements is significant only insofar as they agree
> with the enumerators, designated initializers are a better fit than
> positional initializers here. Convert this table accordingly.
> 
> [1] 4536fe9640b6 ("phy: usb: suppress OC condition for 7439b2")
> 
> Signed-off-by: Sam Edwards <CFSworks@gmail.com>

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
-- 
Florian

Patchew 2.1-devel-b67e4c2

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