This series adds a platform driver dealing with read-only PLLs derived
from the main crystal, and some divider clocks based on those PLLs. It
also acts at the one instantiating reset and pinctrl auxiliary devices.
One special feature is that some clocks are required before platform
bus infrastructure is available; we therefore register some clocks at
of_clk_init() stage.
We support EyeQ5, EyeQ6L and EyeQ6H SoCs. The last one is special in
that there are seven instances of this system-controller. All of those
handle clocks.
The clock driver instantiates reset and pinctrl auxiliary devices
present in the same system controller. Those drivers are upstream
already, as well as the devicetree patches to switch from static clocks
to using this driver:
- 487b1b32e317 ("reset: eyeq: add platform driver") since v6.12-rc1
- 41795aa1f56a ("pinctrl: eyeq5: add platform driver") since v6.12-rc1
- bde4b22dc526 ("dt-bindings: soc: mobileye: add EyeQ OLB system
controller") since v6.11-rc1
I had a pending question [0], asking for confirmation that the static
linked list to inherit cells from of_clk_init() stage to platform
device probe is indeed the right solution. As -rc1 got released I sent
the new revision anyway.
Have a nice day,
Thanks,
Théo
[0]: https://lore.kernel.org/lkml/D4ELMFAUQYZ7.3LXGQZJSX68UF@bootlin.com/
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
---
Changes in v4:
- clk-divider:
- Switch flags function arguments from u16 to unsigned long.
- clk-eyeq Kconfig:
- Remove OF dependency that is not required.
- clk-eyeq driver:
- eqc_pll_parse_registers():
- Make clk accuracy computation more explicit using a comment.
- Early return when not spread spectrum, to deindent code.
- Rename eqc_init() to eqc_early_init().
- Remove the early match table. Register a different function in each
CLK_OF_DECLARE_DRIVER(), which calls eqc_early_init() with an
additional match data argument.
- Add __initconst to early match data structs.
- Remove spinlock on static linked list.
- Link to v3: https://lore.kernel.org/r/20240708-mbly-clk-v3-0-f3fa1ee28fed@bootlin.com
Changes in v3:
- Kconfig: add "depends on 64BIT" because we use readq(). This removes
the ability to COMPILE_TEST the driver on 32bit, which is fine as
this is a SoC clk platform driver used on 64bit SoCs.
- driver: avoid `of_match_node(...)->data` because, if !CONFIG_OF,
of_match_node(...) is resolved by the preprocessor to NULL.
There is still a warning "eqc_early_match_table declared but unused"
if !CONFIG_OF. We fix the <linux/of.h> header in a separate patch:
https://lore.kernel.org/lkml/20240708-of-match-node-v1-1-90aaa7c2d21d@bootlin.com/
- Link to v2: see [1]
Changes in v2:
- bindings: take Acked-by: Krzysztof Kozlowski.
- driver: eqc_auxdev_create(): cast the `void __iomem *base` variable to
(void __force *) before putting it in platform_data, to avoid sparse
warning.
- Link to v1: see [1]
Changes since OLB v3 [0]:
- MAINTAINERS: Move changes into a separate commit to avoid merge
conflicts. This commit is in the MIPS series [3].
- dt-bindings: split include/dt-bindings/ changes into its own commit.
It is part of this clk series.
- dt-bindings: Take Reviewed-by: Rob Herring. The include/dt-bindings/
new commit has NOT inherited from it, just to make sure.
---
Théo Lebrun (4):
Revert "dt-bindings: clock: mobileye,eyeq5-clk: add bindings"
dt-bindings: clock: add Mobileye EyeQ6L/EyeQ6H clock indexes
clk: divider: Introduce CLK_DIVIDER_EVEN_INTEGERS flag
clk: eyeq: add driver
.../bindings/clock/mobileye,eyeq5-clk.yaml | 51 --
drivers/clk/Kconfig | 12 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-divider.c | 16 +-
drivers/clk/clk-eyeq.c | 783 +++++++++++++++++++++
include/dt-bindings/clock/mobileye,eyeq5-clk.h | 21 +
include/linux/clk-provider.h | 15 +-
7 files changed, 839 insertions(+), 60 deletions(-)
---
base-commit: 31d10adec91d1b3e51d7eaea7fdf294f1ebe83df
change-id: 20240628-mbly-clk-4c6ebc716347
Best regards,
--
Théo Lebrun <theo.lebrun@bootlin.com>