From: Conor Dooley <conor.dooley@microchip.com>
Section 35.2. Extensions Overview of [1] says:
| The Zvknhb and Zvbc Vector Crypto Extensions --and accordingly the composite extensions Zvkn and
| Zvks-- (sic) require a Zve64x base, or application ("V") base Vector Extension.
| All of the other Vector Crypto Extensions can be built on any embedded (Zve*) or application ("V") base
| Vector Extension
Apply these rules in the binding, so that invalid combinations can be
avoided.
Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-698e64a-2024-09-09 [1]
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/riscv/extensions.yaml | 32 +++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index abf2579171c5b..02b822bbf341d 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -651,6 +651,38 @@ properties:
- contains:
const: zve64f
+ - if:
+ contains:
+ anyOf:
+ - const: zvbc
+ - const: zvkn
+ - const: zvknhb
+ - const: zvks
+ then:
+ contains:
+ anyOf:
+ - const: v
+ - const: zve64x
+
+ - if:
+ contains:
+ anyOf:
+ - const: zvbb
+ - const: zvkb
+ - const: zvkg
+ - const: zvkned
+ - const: zvknha
+ - const: zvksed
+ - const: zvksh
+ - const: zvknc
+ - const: zvkng
+ - const: zvkt
+ then:
+ contains:
+ anyOf:
+ - const: v
+ - const: zve32x
+
allOf:
# Zcf extension does not exist on rv64
- if:
--
2.45.2
On Wed, Oct 02, 2024 at 05:10:58PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Section 35.2. Extensions Overview of [1] says:
> | The Zvknhb and Zvbc Vector Crypto Extensions --and accordingly the composite extensions Zvkn and
> | Zvks-- (sic) require a Zve64x base, or application ("V") base Vector Extension.
> | All of the other Vector Crypto Extensions can be built on any embedded (Zve*) or application ("V") base
> | Vector Extension
>
> Apply these rules in the binding, so that invalid combinations can be
> avoided.
>
> Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-698e64a-2024-09-09 [1]
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../devicetree/bindings/riscv/extensions.yaml | 32 +++++++++++++++++++
> 1 file changed, 32 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
On 02/10/2024 18:10, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Section 35.2. Extensions Overview of [1] says:
> | The Zvknhb and Zvbc Vector Crypto Extensions --and accordingly the composite extensions Zvkn and
> | Zvks-- (sic) require a Zve64x base, or application ("V") base Vector Extension.
> | All of the other Vector Crypto Extensions can be built on any embedded (Zve*) or application ("V") base
> | Vector Extension
>
> Apply these rules in the binding, so that invalid combinations can be
> avoided.
>
> Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-698e64a-2024-09-09 [1]
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../devicetree/bindings/riscv/extensions.yaml | 32 +++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index abf2579171c5b..02b822bbf341d 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -651,6 +651,38 @@ properties:
> - contains:
> const: zve64f
>
> + - if:
> + contains:
> + anyOf:
> + - const: zvbc
> + - const: zvkn
> + - const: zvknhb
> + - const: zvks
Hey Conor,
Shouldn't zvksed and zvksh be part odf this list ? My understanding of
the spec might be wrong but "Zvks--" seems like a poor-man's wildcard
for Zvks* extensions ?
Thanks,
Clément
> + then:
> + contains:
> + anyOf:
> + - const: v
> + - const: zve64x
> +
> + - if:
> + contains:
> + anyOf:
> + - const: zvbb
> + - const: zvkb
> + - const: zvkg
> + - const: zvkned
> + - const: zvknha
> + - const: zvksed
> + - const: zvksh
> + - const: zvknc
> + - const: zvkng
> + - const: zvkt
> + then:
> + contains:
> + anyOf:
> + - const: v
> + - const: zve32x
> +
> allOf:
> # Zcf extension does not exist on rv64
> - if:
On Thu, Oct 03, 2024 at 09:59:38AM +0200, Clément Léger wrote:
>
>
> On 02/10/2024 18:10, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Section 35.2. Extensions Overview of [1] says:
> > | The Zvknhb and Zvbc Vector Crypto Extensions --and accordingly the composite extensions Zvkn and
> > | Zvks-- (sic) require a Zve64x base, or application ("V") base Vector Extension.
> > | All of the other Vector Crypto Extensions can be built on any embedded (Zve*) or application ("V") base
> > | Vector Extension
> >
> > Apply these rules in the binding, so that invalid combinations can be
> > avoided.
> >
> > Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-698e64a-2024-09-09 [1]
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > .../devicetree/bindings/riscv/extensions.yaml | 32 +++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > index abf2579171c5b..02b822bbf341d 100644
> > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > @@ -651,6 +651,38 @@ properties:
> > - contains:
> > const: zve64f
> >
> > + - if:
> > + contains:
> > + anyOf:
> > + - const: zvbc
> > + - const: zvkn
> > + - const: zvknhb
> > + - const: zvks
>
> Shouldn't zvksed and zvksh be part odf this list ? My understanding of
> the spec might be wrong but "Zvks--" seems like a poor-man's wildcard
> for Zvks* extensions ?
I don't think so, there's a corresponding -- on the first line of the
quote. I think it is some really odd styling that should be replaced by
commas.
On 03/10/2024 13:05, Conor Dooley wrote:
> On Thu, Oct 03, 2024 at 09:59:38AM +0200, Clément Léger wrote:
>>
>>
>> On 02/10/2024 18:10, Conor Dooley wrote:
>>> From: Conor Dooley <conor.dooley@microchip.com>
>>>
>>> Section 35.2. Extensions Overview of [1] says:
>>> | The Zvknhb and Zvbc Vector Crypto Extensions --and accordingly the composite extensions Zvkn and
>>> | Zvks-- (sic) require a Zve64x base, or application ("V") base Vector Extension.
>>> | All of the other Vector Crypto Extensions can be built on any embedded (Zve*) or application ("V") base
>>> | Vector Extension
>>>
>>> Apply these rules in the binding, so that invalid combinations can be
>>> avoided.
>>>
>>> Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-698e64a-2024-09-09 [1]
>>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>>> ---
>>> .../devicetree/bindings/riscv/extensions.yaml | 32 +++++++++++++++++++
>>> 1 file changed, 32 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
>>> index abf2579171c5b..02b822bbf341d 100644
>>> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
>>> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
>>> @@ -651,6 +651,38 @@ properties:
>>> - contains:
>>> const: zve64f
>>>
>>> + - if:
>>> + contains:
>>> + anyOf:
>>> + - const: zvbc
>>> + - const: zvkn
>>> + - const: zvknhb
>>> + - const: zvks
>>
>> Shouldn't zvksed and zvksh be part odf this list ? My understanding of
>> the spec might be wrong but "Zvks--" seems like a poor-man's wildcard
>> for Zvks* extensions ?
>
> I don't think so, there's a corresponding -- on the first line of the
> quote. I think it is some really odd styling that should be replaced by
> commas.
>
Oh yes, my bad.
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