The Apple A8X SoC seems to be slowest at resetting, taking up to around
125ms to reset. Wait 150ms to be safe here.

Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
---
 drivers/watchdog/apple_wdt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/watchdog/apple_wdt.c b/drivers/watchdog/apple_wdt.c
index d4f739932f0b..353ecf0b04dc 100644
--- a/drivers/watchdog/apple_wdt.c
+++ b/drivers/watchdog/apple_wdt.c
@@ -127,11 +127,11 @@ static int apple_wdt_restart(struct watchdog_device *wdd, unsigned long mode,
 	/*
 	 * Flush writes and then wait for the SoC to reset. Even though the
 	 * reset is queued almost immediately experiments have shown that it
-	 * can take up to ~20-25ms until the SoC is actually reset. Just wait
-	 * 50ms here to be safe.
+	 * can take up to ~120-125ms until the SoC is actually reset. Just
+	 * wait 150ms here to be safe.
 	 */
 	(void)readl_relaxed(wdt->regs + APPLE_WDT_WD1_CUR_TIME);
-	mdelay(50);
+	mdelay(150);
 
 	return 0;
 }

base-commit: cea5425829f77e476b03702426f6b3701299b925
-- 
2.46.0

On Mon, Sep 30, 2024, at 06:06, Nick Chan wrote:
> The Apple A8X SoC seems to be slowest at resetting, taking up to around
> 125ms to reset. Wait 150ms to be safe here.
>
> Reviewed-by: Sven Peter <sven@svenpeter.dev>
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Nick Chan <towinchenmi@gmail.com>
> ---
>  drivers/watchdog/apple_wdt.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/watchdog/apple_wdt.c b/drivers/watchdog/apple_wdt.c
> index d4f739932f0b..353ecf0b04dc 100644
> --- a/drivers/watchdog/apple_wdt.c
> +++ b/drivers/watchdog/apple_wdt.c
> @@ -127,11 +127,11 @@ static int apple_wdt_restart(struct 
> watchdog_device *wdd, unsigned long mode,
>  	/*
>  	 * Flush writes and then wait for the SoC to reset. Even though the
>  	 * reset is queued almost immediately experiments have shown that it
> -	 * can take up to ~20-25ms until the SoC is actually reset. Just wait
> -	 * 50ms here to be safe.
> +	 * can take up to ~120-125ms until the SoC is actually reset. Just
> +	 * wait 150ms here to be safe.
>  	 */
>  	(void)readl_relaxed(wdt->regs + APPLE_WDT_WD1_CUR_TIME);
> -	mdelay(50);
> +	mdelay(150);

I think you also need to insert a barrier before the mdelay(),
or turn the readl_relaxed() into a readl(), it will otherwise
be bypassed by the delay.

The comment is a bit confusing here as it suggests that the
MMIO read is meant to serialize between the restart and the
mdelay(), but the _relaxed() annotation on the readl()
explicitly skips that serialization, so one of the two is
wrong here.

       Arnd