.../boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 14 ++++++++++---- arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 4 +--- 2 files changed, 11 insertions(+), 7 deletions(-)
Update gpio-line-names. Add missing and remove unused.
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
---
.../boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 14 ++++++++++----
arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 4 +---
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index 50debe821c42..cd8645be7ffd 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
@@ -322,15 +322,16 @@ &usdhc2 {
&gpio1 {
gpio-line-names = "", "", "X_PMIC_WDOG_B", "",
- "PMIC_SD_VSEL", "", "", "", "", "",
- "", "", "USB1_OTG_PWR", "", "", "X_nETHPHY_INT";
+ "PMIC_SD_VSEL", "", "", "", "PCIe_nPERST", "LVDS1REG_EN",
+ "PCIe_nWAKE", "PCIe_nCLKREQ", "USB1_OTG_PWR", "",
+ "PCIe_nW_DISABLE";
};
&gpio2 {
gpio-line-names = "", "", "", "",
"", "", "", "", "", "",
"", "", "X_SD2_CD_B", "", "", "",
- "", "", "", "SD2_RESET_B";
+ "", "", "", "SD2_RESET_B", "LVDS1_BL_EN";
};
&gpio3 {
@@ -344,7 +345,12 @@ &gpio4 {
gpio-line-names = "", "", "", "",
"", "", "", "", "", "",
"", "", "", "", "", "",
- "", "", "X_PMIC_IRQ_B", "", "nENET0_INT_PWDN";
+ "", "", "X_PMIC_IRQ_B", "nRTC_INT", "nENET0_INT_PWDN";
+};
+
+&gpio5 {
+ gpio-line-names = "", "", "", "",
+ "", "", "", "", "", "X_ECSPI1_SSO";
};
&iomuxc {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
index a5ecdca8bc0e..04f724c6ec21 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
@@ -209,9 +209,7 @@ &wdog1 {
};
&gpio1 {
- gpio-line-names = "", "", "X_PMIC_WDOG_B", "",
- "", "", "", "", "", "",
- "", "", "", "", "", "X_nETHPHY_INT";
+ gpio-line-names = "", "", "X_PMIC_WDOG_B";
};
&gpio4 {
---
base-commit: de5cb0dcb74c294ec527eddfe5094acfdb21ff21
change-id: 20240925-wip-bhahn-update_gpio_lines-387fac08e3d7
Best regards,
--
Benjamin Hahn <B.Hahn@phytec.de>
On Fri, Sep 27, 2024 at 01:34:16PM +0200, Benjamin Hahn wrote: > Update gpio-line-names. Add missing and remove unused. > > Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> Applied, thanks!
Am Freitag, dem 27.09.2024 um 13:34 +0200 schrieb Benjamin Hahn: > Update gpio-line-names. Add missing and remove unused. > > Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> Reviewed-by: Teresa Remmet <t.remmet@phytec.de> > --- > .../boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 14 > ++++++++++---- > arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 4 +--- > 2 files changed, 11 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux- > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux- > rdk.dts > index 50debe821c42..cd8645be7ffd 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts > @@ -322,15 +322,16 @@ &usdhc2 { > > &gpio1 { > gpio-line-names = "", "", "X_PMIC_WDOG_B", "", > - "PMIC_SD_VSEL", "", "", "", "", "", > - "", "", "USB1_OTG_PWR", "", "", "X_nETHPHY_INT"; > + "PMIC_SD_VSEL", "", "", "", "PCIe_nPERST", > "LVDS1REG_EN", > + "PCIe_nWAKE", "PCIe_nCLKREQ", "USB1_OTG_PWR", "", > + "PCIe_nW_DISABLE"; > }; > > &gpio2 { > gpio-line-names = "", "", "", "", > "", "", "", "", "", "", > "", "", "X_SD2_CD_B", "", "", "", > - "", "", "", "SD2_RESET_B"; > + "", "", "", "SD2_RESET_B", "LVDS1_BL_EN"; > }; > > &gpio3 { > @@ -344,7 +345,12 @@ &gpio4 { > gpio-line-names = "", "", "", "", > "", "", "", "", "", "", > "", "", "", "", "", "", > - "", "", "X_PMIC_IRQ_B", "", "nENET0_INT_PWDN"; > + "", "", "X_PMIC_IRQ_B", "nRTC_INT", > "nENET0_INT_PWDN"; > +}; > + > +&gpio5 { > + gpio-line-names = "", "", "", "", > + "", "", "", "", "", "X_ECSPI1_SSO"; > }; > > &iomuxc { > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi > index a5ecdca8bc0e..04f724c6ec21 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi > @@ -209,9 +209,7 @@ &wdog1 { > }; > > &gpio1 { > - gpio-line-names = "", "", "X_PMIC_WDOG_B", "", > - "", "", "", "", "", "", > - "", "", "", "", "", "X_nETHPHY_INT"; > + gpio-line-names = "", "", "X_PMIC_WDOG_B"; > }; > > &gpio4 { > > --- > base-commit: de5cb0dcb74c294ec527eddfe5094acfdb21ff21 > change-id: 20240925-wip-bhahn-update_gpio_lines-387fac08e3d7 > > Best regards, -- PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber, Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE 149059855
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