[PATCH v7 6/6] cpufreq: ti-cpufreq: Update efuse/rev offsets in AM62 family

Dhruva Gole posted 6 patches 2 months ago
[PATCH v7 6/6] cpufreq: ti-cpufreq: Update efuse/rev offsets in AM62 family
Posted by Dhruva Gole 2 months ago
With the Silicon revision being taken directly from socinfo, there's no
longer any need for reading any SOC register for revision from this driver.
Hence, we do not require any rev_offset for AM62 family of devices.
The efuse offset should be 0x0 for AM625 as well, as the syscon
register being used from DT refers to the efuse_offset directly.

However, to maintain the backward compatibility with old devicetree, also
add condition to handle the case where we have the wrong offset and add
the older efuse_offset value there such that we don't end up reading the
wrong register offset.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
---
 drivers/cpufreq/ti-cpufreq.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index ba621ce1cdda694c98867422dbb7f10c0df2afef..054eadd7a3bf98a15d765e0506dbfa7ed0706f4f 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -313,10 +313,9 @@ static const struct soc_device_attribute k3_cpufreq_soc[] = {
 
 static struct ti_cpufreq_soc_data am625_soc_data = {
 	.efuse_xlate = am625_efuse_xlate,
-	.efuse_offset = 0x0018,
+	.efuse_offset = 0x0,
 	.efuse_mask = 0x07c0,
 	.efuse_shift = 0x6,
-	.rev_offset = 0x0014,
 	.multi_regulator = false,
 };
 
@@ -325,7 +324,6 @@ static struct ti_cpufreq_soc_data am62a7_soc_data = {
 	.efuse_offset = 0x0,
 	.efuse_mask = 0x07c0,
 	.efuse_shift = 0x6,
-	.rev_offset = 0x0014,
 	.multi_regulator = false,
 };
 
@@ -334,7 +332,6 @@ static struct ti_cpufreq_soc_data am62p5_soc_data = {
 	.efuse_offset = 0x0,
 	.efuse_mask = 0x07c0,
 	.efuse_shift = 0x6,
-	.rev_offset = 0x0014,
 	.multi_regulator = false,
 };
 
@@ -349,11 +346,26 @@ static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
 				u32 *efuse_value)
 {
 	struct device *dev = opp_data->cpu_dev;
+	struct device_node *np = of_find_node_by_path("/bus@f0000/bus@b00000/syscon@43000000");
 	u32 efuse;
 	int ret;
 
-	ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
-			  &efuse);
+	/*
+	 * This checks for old AM625 Devicetrees where the syscon was a phandle to the
+	 * wkup_conf parent, this required a hard-coded offset to the efuse register.
+	 * This node had the compatibles "syscon", "simple-mfd".
+	 */
+	if (of_device_is_compatible(np, "simple-mfd") &&
+	    of_machine_is_compatible("ti,am625")) {
+		dev_warn(dev,
+			 "%s: An old devicetree is in use, please consider updating at some point!",
+			 __func__);
+		ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset + 0x0018,
+				  &efuse);
+	} else {
+		ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
+				  &efuse);
+	}
 	if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
 		/* not a syscon register! */
 		void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +

-- 
2.34.1
Re: [PATCH v7 6/6] cpufreq: ti-cpufreq: Update efuse/rev offsets in AM62 family
Posted by Nishanth Menon 2 months ago
On 14:04-20240926, Dhruva Gole wrote:
[...]

> +	/*
> +	 * This checks for old AM625 Devicetrees where the syscon was a phandle to the
> +	 * wkup_conf parent, this required a hard-coded offset to the efuse register.
> +	 * This node had the compatibles "syscon", "simple-mfd".
> +	 */
> +	if (of_device_is_compatible(np, "simple-mfd") &&
> +	    of_machine_is_compatible("ti,am625")) {
> +		dev_warn(dev,
> +			 "%s: An old devicetree is in use, please consider updating at some point!",
> +			 __func__);

No need to print.. just handle it seamlessly.

> +		ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset + 0x0018,
> +				  &efuse);
> +	} else {
> +		ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
> +				  &efuse);
> +	}
>  	if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
>  		/* not a syscon register! */
>  		void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +


All these hanky panky is because sycon does not report access fails when
syscon reg size is 1 word.

https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/
fixes that. With that applied, instead of using explicit property of the
syscon - which could change simple-mfd or simple-bus or what ever.. Let
us use the quirk for backward compatibility (introduced for similar
messy old code), consider the following (macro probably needs a better
naming):

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index ba621ce1cdda..f0d76fc02ff2 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -93,6 +93,8 @@ struct ti_cpufreq_soc_data {
 	bool multi_regulator;
 /* Backward compatibility hack: Might have missing syscon */
 #define TI_QUIRK_SYSCON_MAY_BE_MISSING	0x1
+/* Backward compatibility hack: new syscon size is 1 register wide */
+#define TI_QUIRK_SYSCON_NEW_SINGLE_REG	0x2
 	u8 quirks;
 };
 
@@ -318,6 +320,7 @@ static struct ti_cpufreq_soc_data am625_soc_data = {
 	.efuse_shift = 0x6,
 	.rev_offset = 0x0014,
 	.multi_regulator = false,
+	.quirks = TI_QUIRK_SYSCON_NEW_SINGLE_REG,
 };
 
 static struct ti_cpufreq_soc_data am62a7_soc_data = {
@@ -354,6 +357,10 @@ static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
 
 	ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
 			  &efuse);
+
+	if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_NEW_SINGLE_REG && ret == -EIO)
+		ret = regmap_read(opp_data->syscon, 0x0, &efuse);
+
 	if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
 		/* not a syscon register! */
 		void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +

-- 
Regards,
Nishanth Menon
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