tools/perf/util/mem-events.c | 2 ++ 1 file changed, 2 insertions(+)
With commit 8ec9497d3ef34 ("tools/include: Sync uapi/linux/perf.h
with the kernel sources"), 'perf mem report' gives an incorrect memory
access string.
...
0.02% 1 3644 L5 hit [.] 0x0000000000009b0e mlc [.] 0x00007fce43f59480
...
This occurs because, if no entry exists in mem_lvlnum, perf_mem__lvl_scnprintf
will default to 'L%d, lvl', which in this case for PERF_MEM_LVLNUM_L2_MHB is 0x05.
Add entries for PERF_MEM_LVLNUM_L2_MHB and PERF_MEM_LVLNUM_MSC to mem_lvlnum,
so that the correct strings are printed.
...
0.02% 1 3644 L2 MHB hit [.] 0x0000000000009b0e mlc [.] 0x00007fce43f59480
...
Fixes: 8ec9497d3ef34 ("tools/include: Sync uapi/linux/perf.h with the kernel sources")
Suggested-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Thomas Falcon <thomas.falcon@intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
---
tools/perf/util/mem-events.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c
index 051feb93ed8d..c630aca5bd93 100644
--- a/tools/perf/util/mem-events.c
+++ b/tools/perf/util/mem-events.c
@@ -366,6 +366,8 @@ static const char * const mem_lvl[] = {
};
static const char * const mem_lvlnum[] = {
+ [PERF_MEM_LVLNUM_L2_MHB] = "L2 MHB",
+ [PERF_MEM_LVLNUM_MSC] = "Memory-side Cache",
[PERF_MEM_LVLNUM_UNC] = "Uncached",
[PERF_MEM_LVLNUM_CXL] = "CXL",
[PERF_MEM_LVLNUM_IO] = "I/O",
--
2.46.0
On 9/25/2024 7:36 PM, Thomas Falcon wrote: > > > With commit 8ec9497d3ef34 ("tools/include: Sync uapi/linux/perf.h > with the kernel sources"), 'perf mem report' gives an incorrect memory > access string. > ... > 0.02% 1 3644 L5 hit [.] 0x0000000000009b0e mlc [.] 0x00007fce43f59480 > ... > > This occurs because, if no entry exists in mem_lvlnum, perf_mem__lvl_scnprintf > will default to 'L%d, lvl', which in this case for PERF_MEM_LVLNUM_L2_MHB is 0x05. > Add entries for PERF_MEM_LVLNUM_L2_MHB and PERF_MEM_LVLNUM_MSC to mem_lvlnum, > so that the correct strings are printed. > ... > 0.02% 1 3644 L2 MHB hit [.] 0x0000000000009b0e mlc [.] 0x00007fce43f59480 > ... > > Fixes: 8ec9497d3ef34 ("tools/include: Sync uapi/linux/perf.h with the kernel sources") > Suggested-by: Kan Liang <kan.liang@linux.intel.com> > Signed-off-by: Thomas Falcon <thomas.falcon@intel.com> > Reviewed-by: Kan Liang <kan.liang@linux.intel.com> This change is fine for me. But for later avoid same issues, I would like to improve a bit: static const char * const mem_lvlnum[] = { [PERF_MEM_LVLNUM_L1] = "L1", [PERF_MEM_LVLNUM_L2] = "L2", [PERF_MEM_LVLNUM_L3] = "L3", [PERF_MEM_LVLNUM_L4] = "L4", [PERF_MEM_LVLNUM_L2_MHB] = "L2 MHB", [PERF_MEM_LVLNUM_MSC] = "Memory-side Cache", ... }; Then in the function perf_mem__lvl_scnprintf() : if (mem_lvlnum[lvl]) l += scnprintf(out + l, sz - l, mem_lvlnum[lvl]); else l += scnprintf(out + l, sz - l, "Unknown level %d", lvl); This can help us easily to catch unexpected memory level. Thanks, Leo > --- > tools/perf/util/mem-events.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c > index 051feb93ed8d..c630aca5bd93 100644 > --- a/tools/perf/util/mem-events.c > +++ b/tools/perf/util/mem-events.c > @@ -366,6 +366,8 @@ static const char * const mem_lvl[] = { > }; > > static const char * const mem_lvlnum[] = { > + [PERF_MEM_LVLNUM_L2_MHB] = "L2 MHB", > + [PERF_MEM_LVLNUM_MSC] = "Memory-side Cache", > [PERF_MEM_LVLNUM_UNC] = "Uncached", > [PERF_MEM_LVLNUM_CXL] = "CXL", > [PERF_MEM_LVLNUM_IO] = "I/O", > -- > 2.46.0 > >
On Wed, 2024-09-25 at 21:16 +0100, Leo Yan wrote: > On 9/25/2024 7:36 PM, Thomas Falcon wrote: > > > > > > With commit 8ec9497d3ef34 ("tools/include: Sync uapi/linux/perf.h > > with the kernel sources"), 'perf mem report' gives an incorrect > > memory > > access string. > > ... > > 0.02% 1 3644 L5 hit [.] 0x0000000000009b0e mlc [.] > > 0x00007fce43f59480 > > ... > > > > This occurs because, if no entry exists in mem_lvlnum, > > perf_mem__lvl_scnprintf > > will default to 'L%d, lvl', which in this case for > > PERF_MEM_LVLNUM_L2_MHB is 0x05. > > Add entries for PERF_MEM_LVLNUM_L2_MHB and PERF_MEM_LVLNUM_MSC to > > mem_lvlnum, > > so that the correct strings are printed. > > ... > > 0.02% 1 3644 L2 MHB hit [.] 0x0000000000009b0e > > mlc [.] 0x00007fce43f59480 > > ... > > > > Fixes: 8ec9497d3ef34 ("tools/include: Sync uapi/linux/perf.h with > > the kernel sources") > > Suggested-by: Kan Liang <kan.liang@linux.intel.com> > > Signed-off-by: Thomas Falcon <thomas.falcon@intel.com> > > Reviewed-by: Kan Liang <kan.liang@linux.intel.com> > > This change is fine for me. But for later avoid same issues, I would > like to > improve a bit: > > static const char * const mem_lvlnum[] = { > [PERF_MEM_LVLNUM_L1] = "L1", > [PERF_MEM_LVLNUM_L2] = "L2", > [PERF_MEM_LVLNUM_L3] = "L3", > [PERF_MEM_LVLNUM_L4] = "L4", > [PERF_MEM_LVLNUM_L2_MHB] = "L2 MHB", > [PERF_MEM_LVLNUM_MSC] = "Memory-side Cache", > ... > }; > > Then in the function perf_mem__lvl_scnprintf() : > > if (mem_lvlnum[lvl]) > l += scnprintf(out + l, sz - l, mem_lvlnum[lvl]); > else > l += scnprintf(out + l, sz - l, "Unknown level %d", lvl); > > This can help us easily to catch unexpected memory level. > Thank you! I will send an updated v2 with your suggested changes. Tom > Thanks, > Leo > > > --- > > tools/perf/util/mem-events.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem- > > events.c > > index 051feb93ed8d..c630aca5bd93 100644 > > --- a/tools/perf/util/mem-events.c > > +++ b/tools/perf/util/mem-events.c > > @@ -366,6 +366,8 @@ static const char * const mem_lvl[] = { > > }; > > > > static const char * const mem_lvlnum[] = { > > + [PERF_MEM_LVLNUM_L2_MHB] = "L2 MHB", > > + [PERF_MEM_LVLNUM_MSC] = "Memory-side Cache", > > [PERF_MEM_LVLNUM_UNC] = "Uncached", > > [PERF_MEM_LVLNUM_CXL] = "CXL", > > [PERF_MEM_LVLNUM_IO] = "I/O", > > -- > > 2.46.0 > > > >
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