The highmem support has been removed by commit a98a6d864d3b ("um:
Remove broken highmem support"). The 2-level page table is sufficient
on UML/i386 now. Remove the 3-level page table support on UML/i386
which is still marked as experimental.

Suggested-by: Benjamin Berg <benjamin@sipsolutions.net>
Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com>
---
 arch/um/configs/i386_defconfig       |  1 -
 arch/um/include/asm/page.h           | 24 ------------------------
 arch/um/include/asm/pgtable-3level.h |  9 ---------
 arch/x86/um/Kconfig                  | 10 +---------
 4 files changed, 1 insertion(+), 43 deletions(-)

diff --git a/arch/um/configs/i386_defconfig b/arch/um/configs/i386_defconfig
index e543cbac8792..0cc717d80be6 100644
--- a/arch/um/configs/i386_defconfig
+++ b/arch/um/configs/i386_defconfig
@@ -1,4 +1,3 @@
-CONFIG_3_LEVEL_PGTABLES=y
 # CONFIG_COMPACTION is not set
 CONFIG_BINFMT_MISC=m
 CONFIG_HOSTFS=y
diff --git a/arch/um/include/asm/page.h b/arch/um/include/asm/page.h
index 9ef9a8aedfa6..8d2ac5e86cf5 100644
--- a/arch/um/include/asm/page.h
+++ b/arch/um/include/asm/page.h
@@ -32,28 +32,6 @@ struct page;
 #define clear_user_page(page, vaddr, pg)	clear_page(page)
 #define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)
 
-#if defined(CONFIG_3_LEVEL_PGTABLES) && !defined(CONFIG_64BIT)
-
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pgd; } pgd_t;
-#define pte_val(p) ((p).pte)
-
-#define pte_get_bits(p, bits) ((p).pte & (bits))
-#define pte_set_bits(p, bits) ((p).pte |= (bits))
-#define pte_clear_bits(p, bits) ((p).pte &= ~(bits))
-#define pte_copy(to, from) ({ (to).pte = (from).pte; })
-#define pte_is_zero(p) (!((p).pte & ~_PAGE_NEWPAGE))
-#define pte_set_val(p, phys, prot) \
-	({ (p).pte = (phys) | pgprot_val(prot); })
-
-#define pmd_val(x)	((x).pmd)
-#define __pmd(x) ((pmd_t) { (x) } )
-
-typedef unsigned long long phys_t;
-
-#else
-
 typedef struct { unsigned long pte; } pte_t;
 typedef struct { unsigned long pgd; } pgd_t;
 
@@ -75,8 +53,6 @@ typedef struct { unsigned long pmd; } pmd_t;
 
 typedef unsigned long phys_t;
 
-#endif
-
 typedef struct { unsigned long pgprot; } pgprot_t;
 
 typedef struct page *pgtable_t;
diff --git a/arch/um/include/asm/pgtable-3level.h b/arch/um/include/asm/pgtable-3level.h
index 8a5032ec231f..3504a92dc485 100644
--- a/arch/um/include/asm/pgtable-3level.h
+++ b/arch/um/include/asm/pgtable-3level.h
@@ -11,11 +11,7 @@
 
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
 
-#ifdef CONFIG_64BIT
 #define PGDIR_SHIFT	30
-#else
-#define PGDIR_SHIFT	31
-#endif
 #define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
 #define PGDIR_MASK	(~(PGDIR_SIZE-1))
 
@@ -32,13 +28,8 @@
  */
 
 #define PTRS_PER_PTE 512
-#ifdef CONFIG_64BIT
 #define PTRS_PER_PMD 512
 #define PTRS_PER_PGD 512
-#else
-#define PTRS_PER_PMD 1024
-#define PTRS_PER_PGD 1024
-#endif
 
 #define USER_PTRS_PER_PGD ((TASK_SIZE + (PGDIR_SIZE - 1)) / PGDIR_SIZE)
 
diff --git a/arch/x86/um/Kconfig b/arch/x86/um/Kconfig
index 186f13268401..7d16baba8f5f 100644
--- a/arch/x86/um/Kconfig
+++ b/arch/x86/um/Kconfig
@@ -29,15 +29,7 @@ config X86_64
 	select MODULES_USE_ELF_RELA
 
 config 3_LEVEL_PGTABLES
-	bool "Three-level pagetables" if !64BIT
-	default 64BIT
-	help
-	  Three-level pagetables will let UML have more than 4G of physical
-	  memory.  All the memory that can't be mapped directly will be treated
-	  as high memory.
-
-	  However, this it experimental on 32-bit architectures, so if unsure say
-	  N (on x86-64 it's automatically enabled, instead, as it's safe there).
+	def_bool 64BIT
 
 config ARCH_HAS_SC_SIGNALS
 	def_bool !64BIT
-- 
2.34.1

On Wed, 2024-09-18 at 14:17 +0800, Tiwei Bie wrote:
> The highmem support has been removed by commit a98a6d864d3b ("um:
> Remove broken highmem support"). The 2-level page table is sufficient
> on UML/i386 now. Remove the 3-level page table support on UML/i386
> which is still marked as experimental.
> 

No real objection, but with the 4-level page table work on 64-bit
pending as well (which likely conflicts), I wonder if we should just
remove 3-level *entirely*?

johannes

On Thu, 2024-09-19 at 08:54 +0200, Johannes Berg wrote:
> On Wed, 2024-09-18 at 14:17 +0800, Tiwei Bie wrote:
> > The highmem support has been removed by commit a98a6d864d3b ("um:
> > Remove broken highmem support"). The 2-level page table is
> > sufficient
> > on UML/i386 now. Remove the 3-level page table support on UML/i386
> > which is still marked as experimental.
> > 
> 
> No real objection, but with the 4-level page table work on 64-bit
> pending as well (which likely conflicts), I wonder if we should just
> remove 3-level *entirely*?

Fine with me. There is only the tiny advantage of saving a few pages of
memory for each process. I just erred on the side of keeping it in case
anyone is cares to the option …

I'll resubmit the patchset without 3-level support then, possibly on
top of this patch. On the assumption that no one actually cares about
3-level page tables on x86_64.

Benjamin

On 2024/9/19 15:22, Benjamin Berg wrote:
> On Thu, 2024-09-19 at 08:54 +0200, Johannes Berg wrote:
>> On Wed, 2024-09-18 at 14:17 +0800, Tiwei Bie wrote:
>>> The highmem support has been removed by commit a98a6d864d3b ("um:
>>> Remove broken highmem support"). The 2-level page table is
>>> sufficient
>>> on UML/i386 now. Remove the 3-level page table support on UML/i386
>>> which is still marked as experimental.
>>>
>>
>> No real objection, but with the 4-level page table work on 64-bit
>> pending as well (which likely conflicts), I wonder if we should just
>> remove 3-level *entirely*?

Fine with me in either way. Keeping only one page table implementation
on UML/x86_64 may require smaller maintenance effort.

> 
> Fine with me. There is only the tiny advantage of saving a few pages of
> memory for each process. I just erred on the side of keeping it in case
> anyone is cares to the option …
> 
> I'll resubmit the patchset without 3-level support then, possibly on
> top of this patch.

Thanks! :)

Regards,
Tiwei

> On the assumption that no one actually cares about
> 3-level page tables on x86_64.
> 
> Benjamin