drivers/cpufreq/amd-pstate.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-)
Existing function names "cppc_*" and "pstate_*" for shared memory and
MSR based systems are not intuitive enough, replace them with "shmem_*" and
"msr_*" respectively.
Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
---
drivers/cpufreq/amd-pstate.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 15e201d5e911..b7a17a3ef122 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -233,7 +233,7 @@ static int amd_pstate_get_energy_pref_index(struct amd_cpudata *cpudata)
return index;
}
-static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf,
+static void msr_update_perf(struct amd_cpudata *cpudata, u32 min_perf,
u32 des_perf, u32 max_perf, bool fast_switch)
{
if (fast_switch)
@@ -243,7 +243,7 @@ static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf,
READ_ONCE(cpudata->cppc_req_cached));
}
-DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf);
+DEFINE_STATIC_CALL(amd_pstate_update_perf, msr_update_perf);
static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata,
u32 min_perf, u32 des_perf,
@@ -306,7 +306,7 @@ static int amd_pstate_set_energy_pref_index(struct amd_cpudata *cpudata,
return ret;
}
-static inline int pstate_enable(bool enable)
+static inline int msr_enable(bool enable)
{
int ret, cpu;
unsigned long logical_proc_id_mask = 0;
@@ -332,7 +332,7 @@ static inline int pstate_enable(bool enable)
return 0;
}
-static int cppc_enable(bool enable)
+static int shmem_enable(bool enable)
{
int cpu, ret = 0;
struct cppc_perf_ctrls perf_ctrls;
@@ -359,14 +359,14 @@ static int cppc_enable(bool enable)
return ret;
}
-DEFINE_STATIC_CALL(amd_pstate_enable, pstate_enable);
+DEFINE_STATIC_CALL(amd_pstate_enable, msr_enable);
static inline int amd_pstate_enable(bool enable)
{
return static_call(amd_pstate_enable)(enable);
}
-static int pstate_init_perf(struct amd_cpudata *cpudata)
+static int msr_init_perf(struct amd_cpudata *cpudata)
{
u64 cap1;
@@ -385,7 +385,7 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)
return 0;
}
-static int cppc_init_perf(struct amd_cpudata *cpudata)
+static int shmem_init_perf(struct amd_cpudata *cpudata)
{
struct cppc_perf_caps cppc_perf;
@@ -420,14 +420,14 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)
return ret;
}
-DEFINE_STATIC_CALL(amd_pstate_init_perf, pstate_init_perf);
+DEFINE_STATIC_CALL(amd_pstate_init_perf, msr_init_perf);
static inline int amd_pstate_init_perf(struct amd_cpudata *cpudata)
{
return static_call(amd_pstate_init_perf)(cpudata);
}
-static void cppc_update_perf(struct amd_cpudata *cpudata,
+static void shmem_update_perf(struct amd_cpudata *cpudata,
u32 min_perf, u32 des_perf,
u32 max_perf, bool fast_switch)
{
@@ -1879,9 +1879,9 @@ static int __init amd_pstate_init(void)
current_pstate_driver->adjust_perf = amd_pstate_adjust_perf;
} else {
pr_debug("AMD CPPC shared memory based functionality is supported\n");
- static_call_update(amd_pstate_enable, cppc_enable);
- static_call_update(amd_pstate_init_perf, cppc_init_perf);
- static_call_update(amd_pstate_update_perf, cppc_update_perf);
+ static_call_update(amd_pstate_enable, shmem_enable);
+ static_call_update(amd_pstate_init_perf, shmem_init_perf);
+ static_call_update(amd_pstate_update_perf, shmem_update_perf);
}
if (amd_pstate_prefcore) {
--
2.34.1
On 9/17/2024 04:14, Dhananjay Ugwekar wrote: > Existing function names "cppc_*" and "pstate_*" for shared memory and > MSR based systems are not intuitive enough, replace them with "shmem_*" and > "msr_*" respectively. > > Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Thanks, I've applied this to https://git.kernel.org/superm1/h/bleeding-edge for now, and after 6.12-rc1 tags will move it over to linux-next for targeting 6.13-rc1. > --- > drivers/cpufreq/amd-pstate.c | 24 ++++++++++++------------ > 1 file changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 15e201d5e911..b7a17a3ef122 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -233,7 +233,7 @@ static int amd_pstate_get_energy_pref_index(struct amd_cpudata *cpudata) > return index; > } > > -static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, > +static void msr_update_perf(struct amd_cpudata *cpudata, u32 min_perf, > u32 des_perf, u32 max_perf, bool fast_switch) > { > if (fast_switch) > @@ -243,7 +243,7 @@ static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, > READ_ONCE(cpudata->cppc_req_cached)); > } > > -DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf); > +DEFINE_STATIC_CALL(amd_pstate_update_perf, msr_update_perf); > > static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata, > u32 min_perf, u32 des_perf, > @@ -306,7 +306,7 @@ static int amd_pstate_set_energy_pref_index(struct amd_cpudata *cpudata, > return ret; > } > > -static inline int pstate_enable(bool enable) > +static inline int msr_enable(bool enable) > { > int ret, cpu; > unsigned long logical_proc_id_mask = 0; > @@ -332,7 +332,7 @@ static inline int pstate_enable(bool enable) > return 0; > } > > -static int cppc_enable(bool enable) > +static int shmem_enable(bool enable) > { > int cpu, ret = 0; > struct cppc_perf_ctrls perf_ctrls; > @@ -359,14 +359,14 @@ static int cppc_enable(bool enable) > return ret; > } > > -DEFINE_STATIC_CALL(amd_pstate_enable, pstate_enable); > +DEFINE_STATIC_CALL(amd_pstate_enable, msr_enable); > > static inline int amd_pstate_enable(bool enable) > { > return static_call(amd_pstate_enable)(enable); > } > > -static int pstate_init_perf(struct amd_cpudata *cpudata) > +static int msr_init_perf(struct amd_cpudata *cpudata) > { > u64 cap1; > > @@ -385,7 +385,7 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) > return 0; > } > > -static int cppc_init_perf(struct amd_cpudata *cpudata) > +static int shmem_init_perf(struct amd_cpudata *cpudata) > { > struct cppc_perf_caps cppc_perf; > > @@ -420,14 +420,14 @@ static int cppc_init_perf(struct amd_cpudata *cpudata) > return ret; > } > > -DEFINE_STATIC_CALL(amd_pstate_init_perf, pstate_init_perf); > +DEFINE_STATIC_CALL(amd_pstate_init_perf, msr_init_perf); > > static inline int amd_pstate_init_perf(struct amd_cpudata *cpudata) > { > return static_call(amd_pstate_init_perf)(cpudata); > } > > -static void cppc_update_perf(struct amd_cpudata *cpudata, > +static void shmem_update_perf(struct amd_cpudata *cpudata, > u32 min_perf, u32 des_perf, > u32 max_perf, bool fast_switch) > { > @@ -1879,9 +1879,9 @@ static int __init amd_pstate_init(void) > current_pstate_driver->adjust_perf = amd_pstate_adjust_perf; > } else { > pr_debug("AMD CPPC shared memory based functionality is supported\n"); > - static_call_update(amd_pstate_enable, cppc_enable); > - static_call_update(amd_pstate_init_perf, cppc_init_perf); > - static_call_update(amd_pstate_update_perf, cppc_update_perf); > + static_call_update(amd_pstate_enable, shmem_enable); > + static_call_update(amd_pstate_init_perf, shmem_init_perf); > + static_call_update(amd_pstate_update_perf, shmem_update_perf); > } > > if (amd_pstate_prefcore) {
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