Mention the Reference Manual and the scripts and tools available
to help calculating the PLL parameters for additional LUT entries.

Suggested-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
Signed-off-by: Frieder Schrempf <frieder@fris.de>
---
 drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
index 1203143bad7a..401178bfcdda 100644
--- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
+++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
@@ -61,7 +61,13 @@ static struct phy_config calculated_phy_pll_cfg = {
 	.pll_div_regs = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
 };
 
-/* The lookup table contains values for which the fractional divder is used */
+/*
+ * The lookup table contains values for which the fractional divder is used.
+ * Please see the i.MX8MP Reference Manual and the resources at [1] for
+ * additional information on calculating values for table entries.
+ *
+ * [1] https://codeberg.org/fschrempf/samsung-hdmi-phy-pll-calculator
+ */
 static const struct phy_config phy_pll_cfg[] = {
 	{
 		.pixclk = 22250000,
-- 
2.46.0