Add Qualcomm extended CTI support in CTI binding file. Qualcomm
extended CTI supports up to 128 triggers.
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
.../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
index 6a73eaa66a42..141efba7c697 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
@@ -87,6 +87,10 @@ properties:
- const: arm,coresight-cti-v8-arch
- const: arm,coresight-cti
- const: arm,primecell
+ - items:
+ - const: qcom,coresight-cti-extended
+ - const: arm,coresight-cti
+ - const: arm,primecell
reg:
maxItems: 1
@@ -254,6 +258,16 @@ examples:
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
};
+ # minimum extended CTI definition.
+ - |
+ cti@10010000 {
+ compatible = "qcom,coresight-cti-extended", "arm,coresight-cti",
+ "arm,primecell";
+ reg = <0x10010000 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ };
# v8 architecturally defined CTI - CPU + ETM connections generated by the
# driver according to the v8 architecture specification.
- |
--
2.41.0
On 03/09/2024 14:18, Mao Jinlong wrote: > Add Qualcomm extended CTI support in CTI binding file. Qualcomm > extended CTI supports up to 128 triggers. > > Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> > --- > .../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml > index 6a73eaa66a42..141efba7c697 100644 > --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml > @@ -87,6 +87,10 @@ properties: > - const: arm,coresight-cti-v8-arch > - const: arm,coresight-cti > - const: arm,primecell > + - items: > + - const: qcom,coresight-cti-extended That's just enum in previous entry/list. > + - const: arm,coresight-cti > + - const: arm,primecell > > reg: > maxItems: 1 > @@ -254,6 +258,16 @@ examples: > clocks = <&soc_smc50mhz>; > clock-names = "apb_pclk"; > }; > + # minimum extended CTI definition. > + - | No need for new example. No differences here. Best regards, Krzysztof
On 2024/9/3 20:42, Krzysztof Kozlowski wrote: > On 03/09/2024 14:18, Mao Jinlong wrote: >> Add Qualcomm extended CTI support in CTI binding file. Qualcomm >> extended CTI supports up to 128 triggers. >> >> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> >> --- >> .../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >> index 6a73eaa66a42..141efba7c697 100644 >> --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >> +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >> @@ -87,6 +87,10 @@ properties: >> - const: arm,coresight-cti-v8-arch >> - const: arm,coresight-cti >> - const: arm,primecell >> + - items: >> + - const: qcom,coresight-cti-extended > > That's just enum in previous entry/list. Sorry for the late response. This is a new CTI type. Need the three items in compatible at the same time, just like other kind of CTIs. > >> + - const: arm,coresight-cti >> + - const: arm,primecell >> >> reg: >> maxItems: 1 >> @@ -254,6 +258,16 @@ examples: >> clocks = <&soc_smc50mhz>; >> clock-names = "apb_pclk"; >> }; >> + # minimum extended CTI definition. >> + - | > > No need for new example. No differences here. This is a new type CTI. > > > Best regards, > Krzysztof >
On 28/04/2025 09:31, Jinlong Mao wrote: > > > On 2024/9/3 20:42, Krzysztof Kozlowski wrote: >> On 03/09/2024 14:18, Mao Jinlong wrote: >>> Add Qualcomm extended CTI support in CTI binding file. Qualcomm >>> extended CTI supports up to 128 triggers. >>> >>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> >>> --- >>> .../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++++++++ >>> 1 file changed, 14 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >>> index 6a73eaa66a42..141efba7c697 100644 >>> --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >>> +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >>> @@ -87,6 +87,10 @@ properties: >>> - const: arm,coresight-cti-v8-arch >>> - const: arm,coresight-cti >>> - const: arm,primecell >>> + - items: >>> + - const: qcom,coresight-cti-extended >> >> That's just enum in previous entry/list. > Sorry for the late response. This is a new CTI type. Need the three > items in compatible at the same time, just like other kind of CTIs. Comment stays valid, you did not address it at all. > >> >>> + - const: arm,coresight-cti >>> + - const: arm,primecell >>> >>> reg: >>> maxItems: 1 >>> @@ -254,6 +258,16 @@ examples: >>> clocks = <&soc_smc50mhz>; >>> clock-names = "apb_pclk"; >>> }; >>> + # minimum extended CTI definition. >>> + - | >> >> No need for new example. No differences here. > This is a new type CTI. Comment stays valid, you did not address it at all. Best regards, Krzysztof
On 2025/4/28 15:39, Krzysztof Kozlowski wrote: > On 28/04/2025 09:31, Jinlong Mao wrote: >> >> >> On 2024/9/3 20:42, Krzysztof Kozlowski wrote: >>> On 03/09/2024 14:18, Mao Jinlong wrote: >>>> Add Qualcomm extended CTI support in CTI binding file. Qualcomm >>>> extended CTI supports up to 128 triggers. >>>> >>>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> >>>> --- >>>> .../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++++++++ >>>> 1 file changed, 14 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >>>> index 6a73eaa66a42..141efba7c697 100644 >>>> --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >>>> +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml >>>> @@ -87,6 +87,10 @@ properties: >>>> - const: arm,coresight-cti-v8-arch >>>> - const: arm,coresight-cti >>>> - const: arm,primecell >>>> + - items: >>>> + - const: qcom,coresight-cti-extended >>> >>> That's just enum in previous entry/list. >> Sorry for the late response. This is a new CTI type. Need the three >> items in compatible at the same time, just like other kind of CTIs. > > > Comment stays valid, you did not address it at all. Hi Krzysztof, Do you mean we only need const: qcom,coresight-cti-extended here ? No need const: arm,coresight-cti and const: arm,primecell as they are in previous entry/list, right ? > >> >>> >>>> + - const: arm,coresight-cti >>>> + - const: arm,primecell >>>> >>>> reg: >>>> maxItems: 1 >>>> @@ -254,6 +258,16 @@ examples: >>>> clocks = <&soc_smc50mhz>; >>>> clock-names = "apb_pclk"; >>>> }; >>>> + # minimum extended CTI definition. >>>> + - | >>> >>> No need for new example. No differences here. >> This is a new type CTI. > > > Comment stays valid, you did not address it at all. > > Best regards, > Krzysztof
On 2025/4/28 16:09, Jinlong Mao wrote:
>
>
> On 2025/4/28 15:39, Krzysztof Kozlowski wrote:
>> On 28/04/2025 09:31, Jinlong Mao wrote:
>>>
>>>
>>> On 2024/9/3 20:42, Krzysztof Kozlowski wrote:
>>>> On 03/09/2024 14:18, Mao Jinlong wrote:
>>>>> Add Qualcomm extended CTI support in CTI binding file. Qualcomm
>>>>> extended CTI supports up to 128 triggers.
>>>>>
>>>>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
>>>>> ---
>>>>> .../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++
>>>>> ++++++
>>>>> 1 file changed, 14 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-
>>>>> cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-
>>>>> cti.yaml
>>>>> index 6a73eaa66a42..141efba7c697 100644
>>>>> --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
>>>>> +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
>>>>> @@ -87,6 +87,10 @@ properties:
>>>>> - const: arm,coresight-cti-v8-arch
>>>>> - const: arm,coresight-cti
>>>>> - const: arm,primecell
>>>>> + - items:
>>>>> + - const: qcom,coresight-cti-extended
>>>>
>>>> That's just enum in previous entry/list.
>>> Sorry for the late response. This is a new CTI type. Need the three
>>> items in compatible at the same time, just like other kind of CTIs.
>>
>>
>> Comment stays valid, you did not address it at all.
> Hi Krzysztof,
>
> Do you mean we only need const: qcom,coresight-cti-extended here ?
> No need const: arm,coresight-cti and const: arm,primecell as they are
> in previous entry/list, right ?
>
Hi Krzysztof,
Do you mean make changes like this ?
- items:
- enum:
- arm,coresight-cti-v8-arch
- qcom,coresight-cti-extended
- const: arm,coresight-cti
- const: arm,primecell
Thanks
Jinlong Mao
>>
>>>
>>>>
>>>>> + - const: arm,coresight-cti
>>>>> + - const: arm,primecell
>>>>> reg:
>>>>> maxItems: 1
>>>>> @@ -254,6 +258,16 @@ examples:
>>>>> clocks = <&soc_smc50mhz>;
>>>>> clock-names = "apb_pclk";
>>>>> };
>>>>> + # minimum extended CTI definition.
>>>>> + - |
>>>>
>>>> No need for new example. No differences here.
>>> This is a new type CTI.
>>
>>
>> Comment stays valid, you did not address it at all.
>>
>> Best regards,
>> Krzysztof
>
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