From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC,
the tamper detector and a small general usage memory of 128B. Add
documentation for it.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
Changes in v3:
- moved the file to clock dt bindings directory as it is the
only functionality supported at the moment; the other functionalities
(tamper detector, SRAM) are offered though register spreaded
though the address space of the VBATTB IP and not actually
individual devices; the other functionalities are not
planned to be supported soon and if they will be I think they
fit better on auxiliary bus than MFD
- dropped interrupt names as requested in the review process
- dropped the inner node for clock controller
- added #clock-cells
- added rtx clock
- updated description for renesas,vbattb-load-nanofarads
- included dt-bindings/interrupt-controller/irq.h in examples section
Changes in v2:
- changed file name and compatible
- updated title, description sections
- added clock controller part documentation and drop dedicated file
for it included in v1
- used items to describe interrupts, interrupt-names, clocks, clock-names,
resets
- dropped node labels and status
- updated clock-names for clock controller to cope with the new
logic on detecting the necessity to setup bypass
.../clock/renesas,r9a08g045-vbattb.yaml | 81 +++++++++++++++++++
1 file changed, 81 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
new file mode 100644
index 000000000000..29df0e01fae5
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
@@ -0,0 +1,81 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/renesas,r9a08g045-vbattb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas Battery Backup Function (VBATTB)
+
+description:
+ Renesas VBATTB is an always on powered module (backed by battery) which
+ controls the RTC clock (VBATTCLK), tamper detection logic and a small
+ general usage memory (128B).
+
+maintainers:
+ - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
+
+properties:
+ compatible:
+ const: renesas,r9a08g045-vbattb
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: tamper detector interrupt
+
+ clocks:
+ items:
+ - description: VBATTB module clock
+ - description: RTC input clock (crystal oscillator or external clock device)
+
+ clock-names:
+ items:
+ - const: bclk
+ - const: rtx
+
+ '#clock-cells':
+ const: 1
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ items:
+ - description: VBATTB module reset
+
+ renesas,vbattb-load-nanofarads:
+ description: load capacitance of the on board crystal oscillator
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 4000, 7000, 9000, 12500 ]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - '#clock-cells'
+ - power-domains
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/r9a08g045-cpg.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ vbattb@1005c000 {
+ compatible = "renesas,r9a08g045-vbattb";
+ reg = <0x1005c000 0x1000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>;
+ clock-names = "bclk", "rtx";
+ #clock-cells = <1>;
+ power-domains = <&cpg>;
+ resets = <&cpg R9A08G045_VBAT_BRESETN>;
+ renesas,vbattb-load-nanofarads = <12500>;
+ };
--
2.39.2
Hi Claudiu,
On Fri, Aug 30, 2024 at 3:02 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC,
> the tamper detector and a small general usage memory of 128B. Add
> documentation for it.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>
> Changes in v3:
> - moved the file to clock dt bindings directory as it is the
> only functionality supported at the moment; the other functionalities
> (tamper detector, SRAM) are offered though register spreaded
> though the address space of the VBATTB IP and not actually
> individual devices; the other functionalities are not
> planned to be supported soon and if they will be I think they
> fit better on auxiliary bus than MFD
The battery-backed-up SRAM could be exported through the
NVMEM framework. I am not sure it offers some way to export the tamper
flag (to indicate it's erased, i.e. empty).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Claudiu,
On Fri, Aug 30, 2024 at 3:02 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC,
> the tamper detector and a small general usage memory of 128B. Add
> documentation for it.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>
> Changes in v3:
> - moved the file to clock dt bindings directory as it is the
> only functionality supported at the moment; the other functionalities
> (tamper detector, SRAM) are offered though register spreaded
> though the address space of the VBATTB IP and not actually
> individual devices; the other functionalities are not
> planned to be supported soon and if they will be I think they
> fit better on auxiliary bus than MFD
> - dropped interrupt names as requested in the review process
> - dropped the inner node for clock controller
> - added #clock-cells
> - added rtx clock
> - updated description for renesas,vbattb-load-nanofarads
> - included dt-bindings/interrupt-controller/irq.h in examples section
Thanks for the update!
LGTM, modulo issues pointed out in other review comments.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Fri, Aug 30, 2024 at 04:02:07PM +0300, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC,
> the tamper detector and a small general usage memory of 128B. Add
> documentation for it.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>
> Changes in v3:
> - moved the file to clock dt bindings directory as it is the
> only functionality supported at the moment; the other functionalities
> (tamper detector, SRAM) are offered though register spreaded
> though the address space of the VBATTB IP and not actually
> individual devices; the other functionalities are not
> planned to be supported soon and if they will be I think they
> fit better on auxiliary bus than MFD
> - dropped interrupt names as requested in the review process
> - dropped the inner node for clock controller
> - added #clock-cells
> - added rtx clock
> - updated description for renesas,vbattb-load-nanofarads
> - included dt-bindings/interrupt-controller/irq.h in examples section
>
> Changes in v2:
> - changed file name and compatible
> - updated title, description sections
> - added clock controller part documentation and drop dedicated file
> for it included in v1
> - used items to describe interrupts, interrupt-names, clocks, clock-names,
> resets
> - dropped node labels and status
> - updated clock-names for clock controller to cope with the new
> logic on detecting the necessity to setup bypass
>
> .../clock/renesas,r9a08g045-vbattb.yaml | 81 +++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
> new file mode 100644
> index 000000000000..29df0e01fae5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
> @@ -0,0 +1,81 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/renesas,r9a08g045-vbattb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas Battery Backup Function (VBATTB)
> +
> +description:
> + Renesas VBATTB is an always on powered module (backed by battery) which
> + controls the RTC clock (VBATTCLK), tamper detection logic and a small
> + general usage memory (128B).
> +
> +maintainers:
> + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> +
> +properties:
> + compatible:
> + const: renesas,r9a08g045-vbattb
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: tamper detector interrupt
> +
> + clocks:
> + items:
> + - description: VBATTB module clock
> + - description: RTC input clock (crystal oscillator or external clock device)
> +
> + clock-names:
> + items:
> + - const: bclk
> + - const: rtx
> +
> + '#clock-cells':
> + const: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + resets:
> + items:
> + - description: VBATTB module reset
> +
> + renesas,vbattb-load-nanofarads:
Use defined units, don't add your own. So -picofarads should work for
you.
> + description: load capacitance of the on board crystal oscillator
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 4000, 7000, 9000, 12500 ]
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - '#clock-cells'
> + - power-domains
> + - resets
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/r9a08g045-cpg.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + vbattb@1005c000 {
clock-controller@...
> + compatible = "renesas,r9a08g045-vbattb";
> + reg = <0x1005c000 0x1000>;
> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>;
> + clock-names = "bclk", "rtx";
> + #clock-cells = <1>;
> + power-domains = <&cpg>;
> + resets = <&cpg R9A08G045_VBAT_BRESETN>;
> + renesas,vbattb-load-nanofarads = <12500>;
> + };
> --
> 2.39.2
>
On 30/08/2024 12:46:33-0500, Rob Herring wrote:
> On Fri, Aug 30, 2024 at 04:02:07PM +0300, Claudiu wrote:
> > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >
> > The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC,
> > the tamper detector and a small general usage memory of 128B. Add
> > documentation for it.
> >
> > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> > ---
> >
> > Changes in v3:
> > - moved the file to clock dt bindings directory as it is the
> > only functionality supported at the moment; the other functionalities
> > (tamper detector, SRAM) are offered though register spreaded
> > though the address space of the VBATTB IP and not actually
> > individual devices; the other functionalities are not
> > planned to be supported soon and if they will be I think they
> > fit better on auxiliary bus than MFD
> > - dropped interrupt names as requested in the review process
> > - dropped the inner node for clock controller
> > - added #clock-cells
> > - added rtx clock
> > - updated description for renesas,vbattb-load-nanofarads
> > - included dt-bindings/interrupt-controller/irq.h in examples section
> >
> > Changes in v2:
> > - changed file name and compatible
> > - updated title, description sections
> > - added clock controller part documentation and drop dedicated file
> > for it included in v1
> > - used items to describe interrupts, interrupt-names, clocks, clock-names,
> > resets
> > - dropped node labels and status
> > - updated clock-names for clock controller to cope with the new
> > logic on detecting the necessity to setup bypass
> >
> > .../clock/renesas,r9a08g045-vbattb.yaml | 81 +++++++++++++++++++
> > 1 file changed, 81 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
> > new file mode 100644
> > index 000000000000..29df0e01fae5
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
> > @@ -0,0 +1,81 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/renesas,r9a08g045-vbattb.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Renesas Battery Backup Function (VBATTB)
> > +
> > +description:
> > + Renesas VBATTB is an always on powered module (backed by battery) which
> > + controls the RTC clock (VBATTCLK), tamper detection logic and a small
> > + general usage memory (128B).
> > +
> > +maintainers:
> > + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> > +
> > +properties:
> > + compatible:
> > + const: renesas,r9a08g045-vbattb
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + items:
> > + - description: tamper detector interrupt
> > +
> > + clocks:
> > + items:
> > + - description: VBATTB module clock
> > + - description: RTC input clock (crystal oscillator or external clock device)
> > +
> > + clock-names:
> > + items:
> > + - const: bclk
> > + - const: rtx
> > +
> > + '#clock-cells':
> > + const: 1
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > + resets:
> > + items:
> > + - description: VBATTB module reset
> > +
> > + renesas,vbattb-load-nanofarads:
>
> Use defined units, don't add your own. So -picofarads should work for
> you.
We have a generic quartz-load-femtofarads property for RTCs which is
what you define because the driver has VBATTB_XOSCCR_XSEL_4_PF which I
guess is 4 pF which is 0.004 nF and 4000 fF.
>
> > + description: load capacitance of the on board crystal oscillator
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + enum: [ 4000, 7000, 9000, 12500 ]
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - clock-names
> > + - '#clock-cells'
> > + - power-domains
> > + - resets
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/r9a08g045-cpg.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > +
> > + vbattb@1005c000 {
>
> clock-controller@...
>
> > + compatible = "renesas,r9a08g045-vbattb";
> > + reg = <0x1005c000 0x1000>;
> > + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>;
> > + clock-names = "bclk", "rtx";
> > + #clock-cells = <1>;
> > + power-domains = <&cpg>;
> > + resets = <&cpg R9A08G045_VBAT_BRESETN>;
> > + renesas,vbattb-load-nanofarads = <12500>;
> > + };
> > --
> > 2.39.2
> >
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 31.08.2024 01:06, Alexandre Belloni wrote:
> On 30/08/2024 12:46:33-0500, Rob Herring wrote:
>> On Fri, Aug 30, 2024 at 04:02:07PM +0300, Claudiu wrote:
>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>
>>> The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC,
>>> the tamper detector and a small general usage memory of 128B. Add
>>> documentation for it.
>>>
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>> ---
>>>
>>> Changes in v3:
>>> - moved the file to clock dt bindings directory as it is the
>>> only functionality supported at the moment; the other functionalities
>>> (tamper detector, SRAM) are offered though register spreaded
>>> though the address space of the VBATTB IP and not actually
>>> individual devices; the other functionalities are not
>>> planned to be supported soon and if they will be I think they
>>> fit better on auxiliary bus than MFD
>>> - dropped interrupt names as requested in the review process
>>> - dropped the inner node for clock controller
>>> - added #clock-cells
>>> - added rtx clock
>>> - updated description for renesas,vbattb-load-nanofarads
>>> - included dt-bindings/interrupt-controller/irq.h in examples section
>>>
>>> Changes in v2:
>>> - changed file name and compatible
>>> - updated title, description sections
>>> - added clock controller part documentation and drop dedicated file
>>> for it included in v1
>>> - used items to describe interrupts, interrupt-names, clocks, clock-names,
>>> resets
>>> - dropped node labels and status
>>> - updated clock-names for clock controller to cope with the new
>>> logic on detecting the necessity to setup bypass
>>>
>>> .../clock/renesas,r9a08g045-vbattb.yaml | 81 +++++++++++++++++++
>>> 1 file changed, 81 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
>>> new file mode 100644
>>> index 000000000000..29df0e01fae5
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
>>> @@ -0,0 +1,81 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/clock/renesas,r9a08g045-vbattb.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Renesas Battery Backup Function (VBATTB)
>>> +
>>> +description:
>>> + Renesas VBATTB is an always on powered module (backed by battery) which
>>> + controls the RTC clock (VBATTCLK), tamper detection logic and a small
>>> + general usage memory (128B).
>>> +
>>> +maintainers:
>>> + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>> +
>>> +properties:
>>> + compatible:
>>> + const: renesas,r9a08g045-vbattb
>>> +
>>> + reg:
>>> + maxItems: 1
>>> +
>>> + interrupts:
>>> + items:
>>> + - description: tamper detector interrupt
>>> +
>>> + clocks:
>>> + items:
>>> + - description: VBATTB module clock
>>> + - description: RTC input clock (crystal oscillator or external clock device)
>>> +
>>> + clock-names:
>>> + items:
>>> + - const: bclk
>>> + - const: rtx
>>> +
>>> + '#clock-cells':
>>> + const: 1
>>> +
>>> + power-domains:
>>> + maxItems: 1
>>> +
>>> + resets:
>>> + items:
>>> + - description: VBATTB module reset
>>> +
>>> + renesas,vbattb-load-nanofarads:
>>
>> Use defined units, don't add your own. So -picofarads should work for
>> you.
>
> We have a generic quartz-load-femtofarads property for RTCs which is
> what you define because the driver has VBATTB_XOSCCR_XSEL_4_PF which I
> guess is 4 pF which is 0.004 nF and 4000 fF.
I'll use this one in the next version.
Thank you for your review,
Claudiu Beznea
>
>>
>>> + description: load capacitance of the on board crystal oscillator
>>> + $ref: /schemas/types.yaml#/definitions/uint32
>>> + enum: [ 4000, 7000, 9000, 12500 ]
>>> +
>>> +required:
>>> + - compatible
>>> + - reg
>>> + - interrupts
>>> + - clocks
>>> + - clock-names
>>> + - '#clock-cells'
>>> + - power-domains
>>> + - resets
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> + - |
>>> + #include <dt-bindings/clock/r9a08g045-cpg.h>
>>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>>> + #include <dt-bindings/interrupt-controller/irq.h>
>>> +
>>> + vbattb@1005c000 {
>>
>> clock-controller@...
>>
>>> + compatible = "renesas,r9a08g045-vbattb";
>>> + reg = <0x1005c000 0x1000>;
>>> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
>>> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>;
>>> + clock-names = "bclk", "rtx";
>>> + #clock-cells = <1>;
>>> + power-domains = <&cpg>;
>>> + resets = <&cpg R9A08G045_VBAT_BRESETN>;
>>> + renesas,vbattb-load-nanofarads = <12500>;
>>> + };
>>> --
>>> 2.39.2
>>>
>
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