On 30/08/2024 10:45, Rohit Agarwal wrote:
> Add power domain phandle to the DPI controller in mediatek
> mt8186 SoC.
>
> Signed-off-by: Rohit Agarwal <rohiagar@chromium.org>
Applied, thanks
> ---
> arch/arm64/boot/dts/mediatek/mt8186.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index caec83f5eece..85b77ec033c1 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -1843,6 +1843,7 @@ dpi: dpi@1400a000 {
> assigned-clocks = <&topckgen CLK_TOP_DPI>;
> assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
> interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
> + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
> status = "disabled";
>
> port {