arch_supports_noncont_cat() checks if vendor is ARCH_AMD and if that is
not true, ARCH_INTEL is assumed which might not be true either because
get_vendor() can also return zero if neither AMD nor Intel is detected.
Generalize the vendor check using switch/case logic and return false
for unknown vendors.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
tools/testing/selftests/resctrl/cat_test.c | 26 +++++++++++++---------
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c
index 742782438ca3..51a1cb6aac34 100644
--- a/tools/testing/selftests/resctrl/cat_test.c
+++ b/tools/testing/selftests/resctrl/cat_test.c
@@ -292,19 +292,25 @@ static bool arch_supports_noncont_cat(const struct resctrl_test *test)
{
unsigned int eax, ebx, ecx, edx;
- /* AMD always supports non-contiguous CBM. */
- if (get_vendor() == ARCH_AMD)
+ switch (get_vendor()) {
+ case ARCH_AMD:
+ /* AMD always supports non-contiguous CBM. */
return true;
- /* Intel support for non-contiguous CBM needs to be discovered. */
- if (!strcmp(test->resource, "L3"))
- __cpuid_count(0x10, 1, eax, ebx, ecx, edx);
- else if (!strcmp(test->resource, "L2"))
- __cpuid_count(0x10, 2, eax, ebx, ecx, edx);
- else
- return false;
+ case ARCH_INTEL:
+ /* Intel support for non-contiguous CBM needs to be discovered. */
+ if (!strcmp(test->resource, "L3"))
+ __cpuid_count(0x10, 1, eax, ebx, ecx, edx);
+ else if (!strcmp(test->resource, "L2"))
+ __cpuid_count(0x10, 2, eax, ebx, ecx, edx);
+ else
+ return false;
+
+ return ((ecx >> 3) & 1);
- return ((ecx >> 3) & 1);
+ default:
+ return false;
+ }
}
static int noncont_cat_run_test(const struct resctrl_test *test,
--
2.39.2
On 8/13/24 3:45 PM, Ilpo Järvinen wrote:
> arch_supports_noncont_cat() checks if vendor is ARCH_AMD and if that is
> not true, ARCH_INTEL is assumed which might not be true either because
> get_vendor() can also return zero if neither AMD nor Intel is detected.
>
> Generalize the vendor check using switch/case logic and return false
> for unknown vendors.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
> ---
> tools/testing/selftests/resctrl/cat_test.c | 26 +++++++++++++---------
> 1 file changed, 16 insertions(+), 10 deletions(-)
>
> diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c
> index 742782438ca3..51a1cb6aac34 100644
> --- a/tools/testing/selftests/resctrl/cat_test.c
> +++ b/tools/testing/selftests/resctrl/cat_test.c
> @@ -292,19 +292,25 @@ static bool arch_supports_noncont_cat(const struct resctrl_test *test)
> {
> unsigned int eax, ebx, ecx, edx;
>
> - /* AMD always supports non-contiguous CBM. */
> - if (get_vendor() == ARCH_AMD)
> + switch (get_vendor()) {
> + case ARCH_AMD:
> + /* AMD always supports non-contiguous CBM. */
> return true;
>
> - /* Intel support for non-contiguous CBM needs to be discovered. */
> - if (!strcmp(test->resource, "L3"))
> - __cpuid_count(0x10, 1, eax, ebx, ecx, edx);
> - else if (!strcmp(test->resource, "L2"))
> - __cpuid_count(0x10, 2, eax, ebx, ecx, edx);
> - else
> - return false;
> + case ARCH_INTEL:
> + /* Intel support for non-contiguous CBM needs to be discovered. */
> + if (!strcmp(test->resource, "L3"))
> + __cpuid_count(0x10, 1, eax, ebx, ecx, edx);
> + else if (!strcmp(test->resource, "L2"))
> + __cpuid_count(0x10, 2, eax, ebx, ecx, edx);
> + else
> + return false;
> +
> + return ((ecx >> 3) & 1);
>
> - return ((ecx >> 3) & 1);
> + default:
> + return false;
> + }
> }
>
> static int noncont_cat_run_test(const struct resctrl_test *test,
--
BR,
Muhammad Usama Anjum
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