To allow using the same driver for the main reset controller and the
auxiliary ones embedded in the clock controllers, convert the
the Amlogic reset driver to regmap.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/reset/reset-meson.c | 80 ++++++++++++++++++++-----------------
1 file changed, 44 insertions(+), 36 deletions(-)
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index f78be97898bc..8f3d6e9df235 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -11,36 +11,44 @@
#include <linux/of.h>
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <linux/reset-controller.h>
#include <linux/slab.h>
#include <linux/types.h>
-#define BITS_PER_REG 32
-
struct meson_reset_param {
int reg_count;
int level_offset;
};
struct meson_reset {
- void __iomem *reg_base;
const struct meson_reset_param *param;
struct reset_controller_dev rcdev;
- spinlock_t lock;
+ struct regmap *map;
};
+static void meson_reset_offset_and_bit(struct meson_reset *data,
+ unsigned long id,
+ unsigned int *offset,
+ unsigned int *bit)
+{
+ unsigned int stride = regmap_get_reg_stride(data->map);
+
+ *offset = (id / (stride * BITS_PER_BYTE)) * stride;
+ *bit = id % (stride * BITS_PER_BYTE);
+}
+
static int meson_reset_reset(struct reset_controller_dev *rcdev,
- unsigned long id)
+ unsigned long id)
{
struct meson_reset *data =
container_of(rcdev, struct meson_reset, rcdev);
- unsigned int bank = id / BITS_PER_REG;
- unsigned int offset = id % BITS_PER_REG;
- void __iomem *reg_addr = data->reg_base + (bank << 2);
+ unsigned int offset, bit;
- writel(BIT(offset), reg_addr);
+ meson_reset_offset_and_bit(data, id, &offset, &bit);
- return 0;
+ return regmap_update_bits(data->map, offset,
+ BIT(bit), BIT(bit));
}
static int meson_reset_level(struct reset_controller_dev *rcdev,
@@ -48,25 +56,13 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
{
struct meson_reset *data =
container_of(rcdev, struct meson_reset, rcdev);
- unsigned int bank = id / BITS_PER_REG;
- unsigned int offset = id % BITS_PER_REG;
- void __iomem *reg_addr;
- unsigned long flags;
- u32 reg;
+ unsigned int offset, bit;
- reg_addr = data->reg_base + data->param->level_offset + (bank << 2);
+ meson_reset_offset_and_bit(data, id, &offset, &bit);
+ offset += data->param->level_offset;
- spin_lock_irqsave(&data->lock, flags);
-
- reg = readl(reg_addr);
- if (assert)
- writel(reg & ~BIT(offset), reg_addr);
- else
- writel(reg | BIT(offset), reg_addr);
-
- spin_unlock_irqrestore(&data->lock, flags);
-
- return 0;
+ return regmap_update_bits(data->map, offset,
+ BIT(bit), assert ? 0 : BIT(bit));
}
static int meson_reset_assert(struct reset_controller_dev *rcdev,
@@ -113,30 +109,42 @@ static const struct of_device_id meson_reset_dt_ids[] = {
};
MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
+static const struct regmap_config regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+};
+
static int meson_reset_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
struct meson_reset *data;
+ void __iomem *base;
- data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
- data->reg_base = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(data->reg_base))
- return PTR_ERR(data->reg_base);
+ base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
- data->param = of_device_get_match_data(&pdev->dev);
+ data->param = of_device_get_match_data(dev);
if (!data->param)
return -ENODEV;
- spin_lock_init(&data->lock);
+ data->map = devm_regmap_init_mmio(dev, base, ®map_config);
+ if (IS_ERR(data->map))
+ return dev_err_probe(dev, PTR_ERR(data->map),
+ "can't init regmap mmio region\n");
data->rcdev.owner = THIS_MODULE;
- data->rcdev.nr_resets = data->param->reg_count * BITS_PER_REG;
+ data->rcdev.nr_resets = data->param->reg_count * BITS_PER_BYTE
+ * regmap_config.reg_stride;
data->rcdev.ops = &meson_reset_ops;
- data->rcdev.of_node = pdev->dev.of_node;
+ data->rcdev.of_node = dev->of_node;
- return devm_reset_controller_register(&pdev->dev, &data->rcdev);
+ return devm_reset_controller_register(dev, &data->rcdev);
}
static struct platform_driver meson_reset_driver = {
--
2.43.0
On 18/07/2024 11:57, Jerome Brunet wrote:
> To allow using the same driver for the main reset controller and the
> auxiliary ones embedded in the clock controllers, convert the
> the Amlogic reset driver to regmap.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> drivers/reset/reset-meson.c | 80 ++++++++++++++++++++-----------------
> 1 file changed, 44 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index f78be97898bc..8f3d6e9df235 100644
> --- a/drivers/reset/reset-meson.c
> +++ b/drivers/reset/reset-meson.c
> @@ -11,36 +11,44 @@
> #include <linux/of.h>
> #include <linux/module.h>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
> #include <linux/reset-controller.h>
> #include <linux/slab.h>
> #include <linux/types.h>
>
> -#define BITS_PER_REG 32
> -
> struct meson_reset_param {
> int reg_count;
> int level_offset;
> };
>
> struct meson_reset {
> - void __iomem *reg_base;
> const struct meson_reset_param *param;
> struct reset_controller_dev rcdev;
> - spinlock_t lock;
> + struct regmap *map;
> };
>
> +static void meson_reset_offset_and_bit(struct meson_reset *data,
> + unsigned long id,
> + unsigned int *offset,
> + unsigned int *bit)
> +{
> + unsigned int stride = regmap_get_reg_stride(data->map);
> +
> + *offset = (id / (stride * BITS_PER_BYTE)) * stride;
> + *bit = id % (stride * BITS_PER_BYTE);
> +}
> +
> static int meson_reset_reset(struct reset_controller_dev *rcdev,
> - unsigned long id)
> + unsigned long id)
> {
> struct meson_reset *data =
> container_of(rcdev, struct meson_reset, rcdev);
> - unsigned int bank = id / BITS_PER_REG;
> - unsigned int offset = id % BITS_PER_REG;
> - void __iomem *reg_addr = data->reg_base + (bank << 2);
> + unsigned int offset, bit;
>
> - writel(BIT(offset), reg_addr);
> + meson_reset_offset_and_bit(data, id, &offset, &bit);
>
> - return 0;
> + return regmap_update_bits(data->map, offset,
> + BIT(bit), BIT(bit));
Here, you're converting a:
writel(BIT())
to a:
reg = readl()
reg |= BIT()
writel(reg)
so indeed you should use regmap_write(data->map, offset, BIT(bit))
> }
>
> static int meson_reset_level(struct reset_controller_dev *rcdev,
> @@ -48,25 +56,13 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
> {
> struct meson_reset *data =
> container_of(rcdev, struct meson_reset, rcdev);
> - unsigned int bank = id / BITS_PER_REG;
> - unsigned int offset = id % BITS_PER_REG;
> - void __iomem *reg_addr;
> - unsigned long flags;
> - u32 reg;
> + unsigned int offset, bit;
>
> - reg_addr = data->reg_base + data->param->level_offset + (bank << 2);
> + meson_reset_offset_and_bit(data, id, &offset, &bit);
> + offset += data->param->level_offset;
>
> - spin_lock_irqsave(&data->lock, flags);
> -
> - reg = readl(reg_addr);
> - if (assert)
> - writel(reg & ~BIT(offset), reg_addr);
> - else
> - writel(reg | BIT(offset), reg_addr);
> -
> - spin_unlock_irqrestore(&data->lock, flags);
> -
> - return 0;
> + return regmap_update_bits(data->map, offset,
> + BIT(bit), assert ? 0 : BIT(bit));
This one if fine
> }
>
> static int meson_reset_assert(struct reset_controller_dev *rcdev,
> @@ -113,30 +109,42 @@ static const struct of_device_id meson_reset_dt_ids[] = {
> };
> MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
>
> +static const struct regmap_config regmap_config = {
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> +};
> +
> static int meson_reset_probe(struct platform_device *pdev)
> {
> + struct device *dev = &pdev->dev;
> struct meson_reset *data;
> + void __iomem *base;
>
> - data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
> + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> if (!data)
> return -ENOMEM;
>
> - data->reg_base = devm_platform_ioremap_resource(pdev, 0);
> - if (IS_ERR(data->reg_base))
> - return PTR_ERR(data->reg_base);
> + base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(base))
> + return PTR_ERR(base);
>
> - data->param = of_device_get_match_data(&pdev->dev);
> + data->param = of_device_get_match_data(dev);
> if (!data->param)
> return -ENODEV;
>
> - spin_lock_init(&data->lock);
> + data->map = devm_regmap_init_mmio(dev, base, ®map_config);
> + if (IS_ERR(data->map))
> + return dev_err_probe(dev, PTR_ERR(data->map),
> + "can't init regmap mmio region\n");
>
> data->rcdev.owner = THIS_MODULE;
> - data->rcdev.nr_resets = data->param->reg_count * BITS_PER_REG;
> + data->rcdev.nr_resets = data->param->reg_count * BITS_PER_BYTE
> + * regmap_config.reg_stride;
> data->rcdev.ops = &meson_reset_ops;
> - data->rcdev.of_node = pdev->dev.of_node;
> + data->rcdev.of_node = dev->of_node;
>
> - return devm_reset_controller_register(&pdev->dev, &data->rcdev);
> + return devm_reset_controller_register(dev, &data->rcdev);
> }
>
> static struct platform_driver meson_reset_driver = {
On Thu 18 Jul 2024 at 14:45, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>> +
>> static int meson_reset_reset(struct reset_controller_dev *rcdev,
>> - unsigned long id)
>> + unsigned long id)
>> {
>> struct meson_reset *data =
>> container_of(rcdev, struct meson_reset, rcdev);
>> - unsigned int bank = id / BITS_PER_REG;
>> - unsigned int offset = id % BITS_PER_REG;
>> - void __iomem *reg_addr = data->reg_base + (bank << 2);
>> + unsigned int offset, bit;
>> - writel(BIT(offset), reg_addr);
>> + meson_reset_offset_and_bit(data, id, &offset, &bit);
>> - return 0;
>> + return regmap_update_bits(data->map, offset,
>> + BIT(bit), BIT(bit));
>
> Here, you're converting a:
> writel(BIT())
> to a:
> reg = readl()
> reg |= BIT()
> writel(reg)
>
> so indeed you should use regmap_write(data->map, offset, BIT(bit))
>
Ok the trouble is this particular register which is write only, not
some writel vs regmap problem. The read value is probably undefined.
I should not have changed which the migration anyway.
Thanks for pointing it out, I'll fix that in v3
--
Jerome
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