The local u64 variable refdiv_val has the same value as the local u32
variable val and can be removed. Remove it and use val directly as the
divisor in do_div() to also remove the following Coccinelle/coccicheck
warning reported by do_div.cocci:

  WARNING: do_div() does a 64-by-32 division, please consider using div64_u64 instead

Signed-off-by: Thorsten Blum <thorsten.blum@toblux.com>
---
 drivers/clk/hisilicon/clk-hi3559a.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/clk-hi3559a.c
index c79a94f6d9d2..30d5a6ba8fa5 100644
--- a/drivers/clk/hisilicon/clk-hi3559a.c
+++ b/drivers/clk/hisilicon/clk-hi3559a.c
@@ -407,7 +407,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
 		unsigned long parent_rate)
 {
 	struct hi3559av100_clk_pll *clk = to_pll_clk(hw);
-	u64 frac_val, fbdiv_val, refdiv_val;
+	u64 frac_val, fbdiv_val;
 	u32 postdiv1_val, postdiv2_val;
 	u32 val;
 	u64 tmp, rate;
@@ -435,13 +435,12 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
 	val = readl_relaxed(clk->ctrl_reg2);
 	val = val >> clk->refdiv_shift;
 	val &= ((1 << clk->refdiv_width) - 1);
-	refdiv_val = val;
 
 	/* rate = 24000000 * (fbdiv + frac / (1<<24) ) / refdiv  */
 	rate = 0;
 	tmp = 24000000 * fbdiv_val + (24000000 * frac_val) / (1 << 24);
 	rate += tmp;
-	do_div(rate, refdiv_val);
+	do_div(rate, val);
 	do_div(rate, postdiv1_val * postdiv2_val);
 
 	return rate;
-- 
2.45.2

Quoting Thorsten Blum (2024-07-10 13:18:45)
> diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/clk-hi3559a.c
> index c79a94f6d9d2..30d5a6ba8fa5 100644
> --- a/drivers/clk/hisilicon/clk-hi3559a.c
> +++ b/drivers/clk/hisilicon/clk-hi3559a.c
> @@ -407,7 +407,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
>                 unsigned long parent_rate)
>  {
>         struct hi3559av100_clk_pll *clk = to_pll_clk(hw);
> -       u64 frac_val, fbdiv_val, refdiv_val;
> +       u64 frac_val, fbdiv_val;
>         u32 postdiv1_val, postdiv2_val;
>         u32 val;

I see 'val' is u32 here.

>         u64 tmp, rate;
> @@ -435,13 +435,12 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
>         val = readl_relaxed(clk->ctrl_reg2);
>         val = val >> clk->refdiv_shift;
>         val &= ((1 << clk->refdiv_width) - 1);
> -       refdiv_val = val;
>  
>         /* rate = 24000000 * (fbdiv + frac / (1<<24) ) / refdiv  */
>         rate = 0;
>         tmp = 24000000 * fbdiv_val + (24000000 * frac_val) / (1 << 24);
>         rate += tmp;
> -       do_div(rate, refdiv_val);
> +       do_div(rate, val);

So this can be div_u64() now?

>         do_div(rate, postdiv1_val * postdiv2_val);

On 30. Jul 2024, at 01:23, Stephen Boyd <sboyd@kernel.org> wrote:
> Quoting Thorsten Blum (2024-07-10 13:18:45)
>> diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/clk-hi3559a.c
>> index c79a94f6d9d2..30d5a6ba8fa5 100644
>> --- a/drivers/clk/hisilicon/clk-hi3559a.c
>> +++ b/drivers/clk/hisilicon/clk-hi3559a.c
>> @@ -407,7 +407,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
>>                unsigned long parent_rate)
>> {
>>        struct hi3559av100_clk_pll *clk = to_pll_clk(hw);
>> -       u64 frac_val, fbdiv_val, refdiv_val;
>> +       u64 frac_val, fbdiv_val;
>>        u32 postdiv1_val, postdiv2_val;
>>        u32 val;
> 
> I see 'val' is u32 here.
> 
>>        u64 tmp, rate;
>> @@ -435,13 +435,12 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
>>        val = readl_relaxed(clk->ctrl_reg2);
>>        val = val >> clk->refdiv_shift;
>>        val &= ((1 << clk->refdiv_width) - 1);
>> -       refdiv_val = val;
>> 
>>        /* rate = 24000000 * (fbdiv + frac / (1<<24) ) / refdiv  */
>>        rate = 0;
>>        tmp = 24000000 * fbdiv_val + (24000000 * frac_val) / (1 << 24);
>>        rate += tmp;
>> -       do_div(rate, refdiv_val);
>> +       do_div(rate, val);
> 
> So this can be div_u64() now?

Yes, it could be.

Is div_u64() preferred over do_div() when the remainder doesn't matter?

Thanks,
Thorsten

Quoting Thorsten Blum (2024-07-30 15:13:34)
> On 30. Jul 2024, at 01:23, Stephen Boyd <sboyd@kernel.org> wrote:
> > Quoting Thorsten Blum (2024-07-10 13:18:45)
> >> diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/clk-hi3559a.c
> >> index c79a94f6d9d2..30d5a6ba8fa5 100644
> >> --- a/drivers/clk/hisilicon/clk-hi3559a.c
> >> +++ b/drivers/clk/hisilicon/clk-hi3559a.c
> >> @@ -407,7 +407,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
> >>                unsigned long parent_rate)
> >> {
> >>        struct hi3559av100_clk_pll *clk = to_pll_clk(hw);
> >> -       u64 frac_val, fbdiv_val, refdiv_val;
> >> +       u64 frac_val, fbdiv_val;
> >>        u32 postdiv1_val, postdiv2_val;
> >>        u32 val;
> > 
> > I see 'val' is u32 here.
> > 
> >>        u64 tmp, rate;
> >> @@ -435,13 +435,12 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
> >>        val = readl_relaxed(clk->ctrl_reg2);
> >>        val = val >> clk->refdiv_shift;
> >>        val &= ((1 << clk->refdiv_width) - 1);
> >> -       refdiv_val = val;
> >> 
> >>        /* rate = 24000000 * (fbdiv + frac / (1<<24) ) / refdiv  */
> >>        rate = 0;
> >>        tmp = 24000000 * fbdiv_val + (24000000 * frac_val) / (1 << 24);
> >>        rate += tmp;
> >> -       do_div(rate, refdiv_val);
> >> +       do_div(rate, val);
> > 
> > So this can be div_u64() now?
> 
> Yes, it could be.
> 
> Is div_u64() preferred over do_div() when the remainder doesn't matter?

Yes. The comment above the function says

  This is the most common 64bit divide and should be used if possible,
  as many 32bit archs can optimize this variant better than a full 64bit
  divide.