[PATCH v2 1/2] riscv: errata: sifive: Use SYM_*() assembly macros

Jisheng Zhang posted 2 patches 1 year, 7 months ago
[PATCH v2 1/2] riscv: errata: sifive: Use SYM_*() assembly macros
Posted by Jisheng Zhang 1 year, 7 months ago
ENTRY()/END() macros are deprecated and we should make use of the
new SYM_*() macros [1] for better annotation of symbols. Replace the
deprecated ones with the new ones.

[1] https://docs.kernel.org/core-api/asm-annotations.html

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/errata/sifive/errata_cip_453.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/errata/sifive/errata_cip_453.S b/arch/riscv/errata/sifive/errata_cip_453.S
index f1b9623fe1de..b1f7b636fe9a 100644
--- a/arch/riscv/errata/sifive/errata_cip_453.S
+++ b/arch/riscv/errata/sifive/errata_cip_453.S
@@ -21,7 +21,7 @@
 1:
 .endm
 
-ENTRY(sifive_cip_453_page_fault_trp)
+SYM_FUNC_START(sifive_cip_453_page_fault_trp)
 	ADD_SIGN_EXT a0, t0, t1
 #ifdef CONFIG_MMU
 	la t0, do_page_fault
@@ -29,10 +29,10 @@ ENTRY(sifive_cip_453_page_fault_trp)
 	la t0, do_trap_unknown
 #endif
 	jr t0
-END(sifive_cip_453_page_fault_trp)
+SYM_FUNC_END(sifive_cip_453_page_fault_trp)
 
-ENTRY(sifive_cip_453_insn_fault_trp)
+SYM_FUNC_START(sifive_cip_453_insn_fault_trp)
 	ADD_SIGN_EXT a0, t0, t1
 	la t0, do_trap_insn_fault
 	jr t0
-END(sifive_cip_453_insn_fault_trp)
+SYM_FUNC_END(sifive_cip_453_insn_fault_trp)
-- 
2.43.0
Re: [PATCH v2 1/2] riscv: errata: sifive: Use SYM_*() assembly macros
Posted by Clément Léger 1 year, 7 months ago

On 09/07/2024 18:05, Jisheng Zhang wrote:
> ENTRY()/END() macros are deprecated and we should make use of the
> new SYM_*() macros [1] for better annotation of symbols. Replace the
> deprecated ones with the new ones.
> 
> [1] https://docs.kernel.org/core-api/asm-annotations.html
> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>  arch/riscv/errata/sifive/errata_cip_453.S | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/riscv/errata/sifive/errata_cip_453.S b/arch/riscv/errata/sifive/errata_cip_453.S
> index f1b9623fe1de..b1f7b636fe9a 100644
> --- a/arch/riscv/errata/sifive/errata_cip_453.S
> +++ b/arch/riscv/errata/sifive/errata_cip_453.S
> @@ -21,7 +21,7 @@
>  1:
>  .endm
>  
> -ENTRY(sifive_cip_453_page_fault_trp)
> +SYM_FUNC_START(sifive_cip_453_page_fault_trp)
>  	ADD_SIGN_EXT a0, t0, t1
>  #ifdef CONFIG_MMU
>  	la t0, do_page_fault
> @@ -29,10 +29,10 @@ ENTRY(sifive_cip_453_page_fault_trp)
>  	la t0, do_trap_unknown
>  #endif
>  	jr t0
> -END(sifive_cip_453_page_fault_trp)
> +SYM_FUNC_END(sifive_cip_453_page_fault_trp)
>  
> -ENTRY(sifive_cip_453_insn_fault_trp)
> +SYM_FUNC_START(sifive_cip_453_insn_fault_trp)
>  	ADD_SIGN_EXT a0, t0, t1
>  	la t0, do_trap_insn_fault
>  	jr t0
> -END(sifive_cip_453_insn_fault_trp)
> +SYM_FUNC_END(sifive_cip_453_insn_fault_trp)

Hi Jisheng,

Reviewed-By: Clément Léger <cleger@rivosinc.com>

Thanks !

Clément