[v2] Introduce Tegra register config settings

[RFC PATCH V2 10/12] dt-bindings: mmc: tegra-sdhci: reference to config

Posted by Krishna Yarlagadda 1 year, 5 months ago

SDHCI vendor tuning registers are configured using config setting
framework. Add reference to SDHCI controllers config settings.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
 .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml         | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
index 72987f0326a1..39bda6ce1e50 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
@@ -88,6 +88,10 @@ properties:
     items:
       - description: phandle to the core power domain
 
+  config-settings:
+    description: phandle to the sdhci configuration settings
+    $ref: /schemas/types.yaml#/definitions/phandle
+
   nvidia,default-tap:
     description: Specify the default inbound sampling clock trimmer value for
       non-tunable modes.
-- 
2.43.2