[PATCH v2 0/2] iommu/vt-d: Refactor PRI enable/disable steps

Lu Baolu posted 2 patches 1 year, 5 months ago
There is a newer version of this series
drivers/iommu/intel/iommu.h |  13 +++++
drivers/iommu/intel/iommu.c |  89 ++++++++++++++++++-------------
drivers/iommu/intel/pasid.c | 103 ++++++++++++++++++++++++++++--------
3 files changed, 148 insertions(+), 57 deletions(-)
[PATCH v2 0/2] iommu/vt-d: Refactor PRI enable/disable steps
Posted by Lu Baolu 1 year, 5 months ago
The page fault handling framework within the iommu core has defined the
PRI enable and disable flows in the comments for the
iopf_queue_remove_device() interface. This series aims to refactor the
PRI enable/disable steps in the Intel iommu driver to align with these
definitions.

Change log:

v2:
 - The cache invalidation for a context entry change should not affect
   the devices not related to the entry. Fix this by always using
   device-selective cache invalidation.
v1:
 - https://lore.kernel.org/linux-iommu/20240606034019.42795-1-baolu.lu@linux.intel.com/

Lu Baolu (2):
  iommu/vt-d: Add helper to flush caches for context change
  iommu/vt-d: Refactor PCI PRI enabling/disabling callbacks

 drivers/iommu/intel/iommu.h |  13 +++++
 drivers/iommu/intel/iommu.c |  89 ++++++++++++++++++-------------
 drivers/iommu/intel/pasid.c | 103 ++++++++++++++++++++++++++++--------
 3 files changed, 148 insertions(+), 57 deletions(-)

-- 
2.34.1