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[PATCH V5 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node

Devi Priya posted 7 patches 1 year, 5 months ago
There is a newer version of this series
[PATCH V5 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node
Posted by Devi Priya 1 year, 5 months ago 
Add a node for the nss clock controller found on ipq9574 based devices.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
---
 Changes in V5:
	- Dropped interconnects from nsscc node and added 
	  interconnect-cells to NSS clock provider so that it can be used
	  as icc provider.

 arch/arm64/boot/dts/qcom/ipq9574.dtsi | 41 +++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 48dfafea46a7..b6f8800bf63c 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -11,6 +11,8 @@
 #include <dt-bindings/interconnect/qcom,ipq9574.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
+#include <dt-bindings/clock/qcom,ipq9574-nsscc.h>
+#include <dt-bindings/reset/qcom,ipq9574-nsscc.h>
 #include <dt-bindings/thermal/thermal.h>
 
 / {
@@ -19,6 +21,24 @@ / {
 	#size-cells = <2>;
 
 	clocks {
+		bias_pll_cc_clk: bias-pll-cc-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <1200000000>;
+			#clock-cells = <0>;
+		};
+
+		bias_pll_nss_noc_clk: bias-pll-nss-noc-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <461500000>;
+			#clock-cells = <0>;
+		};
+
+		bias_pll_ubi_nc_clk: bias-pll-ubi-nc-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <353000000>;
+			#clock-cells = <0>;
+		};
+
 		sleep_clk: sleep-clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
@@ -756,6 +776,27 @@ frame@b128000 {
 				status = "disabled";
 			};
 		};
+
+		nsscc: clock-controller@39b00000 {
+			compatible = "qcom,ipq9574-nsscc";
+			reg = <0x39b00000 0x80000>;
+			clocks = <&xo_board_clk>,
+				 <&bias_pll_cc_clk>,
+				 <&bias_pll_nss_noc_clk>,
+				 <&bias_pll_ubi_nc_clk>,
+				 <&gcc GPLL0_OUT_AUX>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <&gcc GCC_NSSCC_CLK>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+			#interconnect-cells = <1>;
+		};
 	};
 
 	thermal-zones {
-- 
2.34.1
Re: [PATCH V5 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node
Posted by Konrad Dybcio 1 year, 5 months ago 
On 26.06.2024 4:33 PM, Devi Priya wrote:
> Add a node for the nss clock controller found on ipq9574 based devices.
> 
> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
> ---

Title: s/support for//

You're adding the node, not the support for it.

The nodes look good. Looking at the driver, the interconnect paths that will
be sync_state'd away due to no consumers don't seem to be super critical for
the system, so I'm assuming this doesn't crash

So, with the title fixed:

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Re: [PATCH V5 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node
Posted by Manikanta Mylavarapu 1 year, 2 months ago 

On 6/29/2024 7:00 PM, Konrad Dybcio wrote:
> On 26.06.2024 4:33 PM, Devi Priya wrote:
>> Add a node for the nss clock controller found on ipq9574 based devices.
>>
>> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
>> ---
> 
> Title: s/support for//
> 
> You're adding the node, not the support for it.
> 
> The nodes look good. Looking at the driver, the interconnect paths that will
> be sync_state'd away due to no consumers don't seem to be super critical for
> the system, so I'm assuming this doesn't crash
> 
> So, with the title fixed:
> 

Hi Konrad,

Sorry for the delayed response.

Okay, sure. Will fix the title.

Thanks & Regards,
Manikanta.
Re: [PATCH V5 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node
Posted by Dmitry Baryshkov 1 year, 5 months ago 
On Wed, Jun 26, 2024 at 08:03:01PM GMT, Devi Priya wrote:
> Add a node for the nss clock controller found on ipq9574 based devices.
> 
> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
> ---
>  Changes in V5:
> 	- Dropped interconnects from nsscc node and added 
> 	  interconnect-cells to NSS clock provider so that it can be used
> 	  as icc provider.
> 
>  arch/arm64/boot/dts/qcom/ipq9574.dtsi | 41 +++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> index 48dfafea46a7..b6f8800bf63c 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> @@ -11,6 +11,8 @@
>  #include <dt-bindings/interconnect/qcom,ipq9574.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
> +#include <dt-bindings/clock/qcom,ipq9574-nsscc.h>
> +#include <dt-bindings/reset/qcom,ipq9574-nsscc.h>
>  #include <dt-bindings/thermal/thermal.h>
>  
>  / {
> @@ -19,6 +21,24 @@ / {
>  	#size-cells = <2>;
>  
>  	clocks {
> +		bias_pll_cc_clk: bias-pll-cc-clk {
> +			compatible = "fixed-clock";
> +			clock-frequency = <1200000000>;
> +			#clock-cells = <0>;
> +		};
> +
> +		bias_pll_nss_noc_clk: bias-pll-nss-noc-clk {
> +			compatible = "fixed-clock";
> +			clock-frequency = <461500000>;
> +			#clock-cells = <0>;
> +		};
> +
> +		bias_pll_ubi_nc_clk: bias-pll-ubi-nc-clk {
> +			compatible = "fixed-clock";
> +			clock-frequency = <353000000>;
> +			#clock-cells = <0>;
> +		};

What is the source for these clocks? Is it really an on-board crystal?

> +
>  		sleep_clk: sleep-clk {
>  			compatible = "fixed-clock";
>  			#clock-cells = <0>;
d

-- 
With best wishes
Dmitry
Re: [PATCH V5 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node
Posted by Manikanta Mylavarapu 1 year, 2 months ago 

On 6/26/2024 11:43 PM, Dmitry Baryshkov wrote:
> On Wed, Jun 26, 2024 at 08:03:01PM GMT, Devi Priya wrote:
>> Add a node for the nss clock controller found on ipq9574 based devices.
>>
>> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
>> ---
>>  Changes in V5:
>> 	- Dropped interconnects from nsscc node and added 
>> 	  interconnect-cells to NSS clock provider so that it can be used
>> 	  as icc provider.
>>
>>  arch/arm64/boot/dts/qcom/ipq9574.dtsi | 41 +++++++++++++++++++++++++++
>>  1 file changed, 41 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index 48dfafea46a7..b6f8800bf63c 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -11,6 +11,8 @@
>>  #include <dt-bindings/interconnect/qcom,ipq9574.h>
>>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>>  #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
>> +#include <dt-bindings/clock/qcom,ipq9574-nsscc.h>
>> +#include <dt-bindings/reset/qcom,ipq9574-nsscc.h>
>>  #include <dt-bindings/thermal/thermal.h>
>>  
>>  / {
>> @@ -19,6 +21,24 @@ / {
>>  	#size-cells = <2>;
>>  
>>  	clocks {
>> +		bias_pll_cc_clk: bias-pll-cc-clk {
>> +			compatible = "fixed-clock";
>> +			clock-frequency = <1200000000>;
>> +			#clock-cells = <0>;
>> +		};
>> +
>> +		bias_pll_nss_noc_clk: bias-pll-nss-noc-clk {
>> +			compatible = "fixed-clock";
>> +			clock-frequency = <461500000>;
>> +			#clock-cells = <0>;
>> +		};
>> +
>> +		bias_pll_ubi_nc_clk: bias-pll-ubi-nc-clk {
>> +			compatible = "fixed-clock";
>> +			clock-frequency = <353000000>;
>> +			#clock-cells = <0>;
>> +		};
> 
> What is the source for these clocks? Is it really an on-board crystal?
> 
Hi Dmitry,

Sorry for the delayed response.

No, the CMN PLL [1] is the source for these clocks. Will remove these
nodes and set these entries to 0 in the nsscc node until the CMN
PLL driver posted with these clocks.

1: https://lore.kernel.org/lkml/20240827-qcom_ipq_cmnpll-v3-0-8e009cece8b2@quicinc.com/

Thanks & Regards,
Manikanta.

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