On Tue, 25 Jun 2024 15:08:13 +0530
Shradha Todi <shradha.t@samsung.com> wrote:
> Add call to initialize debugfs from DWC driver and create the RASDES
> debugfs hierarchy for each platform driver. Since it can be used for
> both DW HOST controller as well as DW EP controller, add it in the
> common setup function.
>
> Signed-off-by: Shradha Todi <shradha.t@samsung.com>
Squash this with the previous patch given it's so trivial.
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 2 ++
> drivers/pci/controller/dwc/pcie-designware.c | 4 ++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index d15a5c2d5b48..c2e6f8484000 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -537,6 +537,8 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
> pci_stop_root_bus(pp->bridge->bus);
> pci_remove_root_bus(pp->bridge->bus);
>
> + dwc_pcie_rasdes_debugfs_deinit(pci);
> +
> dw_pcie_stop_link(pci);
>
> dw_pcie_edma_remove(pci);
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index b74e4a97558e..ebb21ba75388 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -1084,4 +1084,8 @@ void dw_pcie_setup(struct dw_pcie *pci)
> dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);
>
> dw_pcie_link_set_max_link_width(pci, pci->num_lanes);
> +
> + val = dwc_pcie_rasdes_debugfs_init(pci);
> + if (val)
> + dev_err(pci->dev, "Couldn't create debugfs files\n");
> }