The x86 build process first generates required and disabled feature
masks based on current build config, and then uses these generated
masks to compile the source code. When a CPU feature is not enabled
in a build config, e.g., when CONFIG_X86_FRED=n, its feature disable
flag, i.e., DISABLE_FRED, needs to be properly defined and added to
a specific disabled CPU features mask in <asm/disabled-features.h>,
as the following patch does:
https://lore.kernel.org/all/20231205105030.8698-8-xin3.li@intel.com/.
As a result, the FRED feature bit is surely cleared in the generated
kernel binary when CONFIG_X86_FRED=n.

Recently there is another case to repeat the same exercise for the
AMD SEV-SNP CPU feature:
https://lore.kernel.org/all/20240126041126.1927228-2-michael.roth@amd.com/.
https://lore.kernel.org/all/20240126041126.1927228-23-michael.roth@amd.com/.

It was one thing when there were four of CPU feature masks, but with
over 20 it is going to cause mistakes, e.g.,
https://lore.kernel.org/lkml/aaed79d5-d683-d1bc-7ba1-b33c8d6db618@suse.com/.

We want to eliminate the stupidly repeated exercise to manually assign
features to CPU feature words through introducing an AWK script to
automatically generate a header with required and disabled CPU feature
masks based on current build config, and this patch set does that.


Changes since v2:
* Remove AWK code that generates extra debugging comments (Brian Gerst).
* Move SSE_MASK to verify_cpu.S, the only place it is used (Brian Gerst).
* Add a patch to generate macros {REQUIRED|DISABLED}_MASK_BIT_SET in the
  new AWK script (Brian Gerst).

Changes since v1:
* Keep the X86_{REQUIRED,DISABLED}_FEATURE_ prefixes solely in
  arch/x86/Kconfig.cpufeatures (Borislav Petkov).
* Explain how config option names X86_{REQUIRED,DISABLED}_FEATURE_<name>
  are formed (Borislav Petkov).
* Remove code generating unused macros {REQUIRED,DISABLED}_FEATURE(x)
  to tell if a CPU feature, e.g., X86_FEATURE_FRED, is a required or
  disabled feature for this particular compile-time configuration.


H. Peter Anvin (Intel) (2):
  x86/cpufeatures: Add {required,disabled} feature configs
  x86/cpufeatures: Generate a feature mask header based on build config

Xin Li (Intel) (2):
  x86/cpufeatures: Remove {disabled,required}-features.h
  x86/cpufeatures: Use AWK to generate {REQUIRED|DISABLED}_MASK_BIT_SET

 arch/x86/Kconfig                              |   4 +-
 arch/x86/Kconfig.cpu                          |  12 +-
 arch/x86/Kconfig.cpufeatures                  | 197 ++++++++++++++++++
 arch/x86/Makefile                             |  17 +-
 arch/x86/boot/cpucheck.c                      |   3 +-
 arch/x86/boot/cpuflags.c                      |   1 -
 arch/x86/boot/mkcpustr.c                      |   3 +-
 arch/x86/include/asm/Kbuild                   |   1 +
 arch/x86/include/asm/asm-prototypes.h         |   2 +-
 arch/x86/include/asm/atomic64_32.h            |   2 +-
 arch/x86/include/asm/bitops.h                 |   4 +-
 arch/x86/include/asm/cmpxchg_32.h             |   2 +-
 arch/x86/include/asm/cpufeature.h             |  70 +------
 arch/x86/include/asm/cpufeatures.h            |   8 -
 arch/x86/include/asm/disabled-features.h      | 161 --------------
 arch/x86/include/asm/required-features.h      | 105 ----------
 arch/x86/kernel/verify_cpu.S                  |   4 +
 arch/x86/lib/Makefile                         |   2 +-
 arch/x86/lib/cmpxchg8b_emu.S                  |   2 +-
 arch/x86/tools/featuremasks.awk               |  94 +++++++++
 lib/atomic64_test.c                           |   2 +-
 tools/arch/x86/include/asm/cpufeatures.h      |   8 -
 .../arch/x86/include/asm/disabled-features.h  | 161 --------------
 .../arch/x86/include/asm/required-features.h  | 105 ----------
 tools/perf/check-headers.sh                   |   2 -
 25 files changed, 327 insertions(+), 645 deletions(-)
 create mode 100644 arch/x86/Kconfig.cpufeatures
 delete mode 100644 arch/x86/include/asm/disabled-features.h
 delete mode 100644 arch/x86/include/asm/required-features.h
 create mode 100755 arch/x86/tools/featuremasks.awk
 delete mode 100644 tools/arch/x86/include/asm/disabled-features.h
 delete mode 100644 tools/arch/x86/include/asm/required-features.h


base-commit: aedd5b6d65f7db9af616404985fc8361373690be
-- 
2.45.2

On 6/22/2024 10:14 AM, Xin Li (Intel) wrote:
> The x86 build process first generates required and disabled feature
> masks based on current build config, and then uses these generated
> masks to compile the source code. When a CPU feature is not enabled
> in a build config, e.g., when CONFIG_X86_FRED=n, its feature disable
> flag, i.e., DISABLE_FRED, needs to be properly defined and added to
> a specific disabled CPU features mask in <asm/disabled-features.h>,
> as the following patch does:
> https://lore.kernel.org/all/20231205105030.8698-8-xin3.li@intel.com/.
> As a result, the FRED feature bit is surely cleared in the generated
> kernel binary when CONFIG_X86_FRED=n.
> 
> Recently there is another case to repeat the same exercise for the
> AMD SEV-SNP CPU feature:
> https://lore.kernel.org/all/20240126041126.1927228-2-michael.roth@amd.com/.
> https://lore.kernel.org/all/20240126041126.1927228-23-michael.roth@amd.com/.
> 
> It was one thing when there were four of CPU feature masks, but with
> over 20 it is going to cause mistakes, e.g.,
> https://lore.kernel.org/lkml/aaed79d5-d683-d1bc-7ba1-b33c8d6db618@suse.com/.
> 
> We want to eliminate the stupidly repeated exercise to manually assign
> features to CPU feature words through introducing an AWK script to
> automatically generate a header with required and disabled CPU feature
> masks based on current build config, and this patch set does that.
> 

Here is an example of the auto generated feature masks header:

ifndef _ASM_X86_FEATUREMASKS_H
#define _ASM_X86_FEATUREMASKS_H

/*
  * REQUIRED features:
  *
  *    FPU PSE MSR PAE CX8 PGE CMOV FXSR XMM XMM2 LM NOPL ALWAYS CPUID
  */

#define REQUIRED_MASK0  0x0700a169
#define REQUIRED_MASK1  0x20000000
#define REQUIRED_MASK2  0x00000000
#define REQUIRED_MASK3  0x02300000
#define REQUIRED_MASK4  0x00000000
#define REQUIRED_MASK5  0x00000000
#define REQUIRED_MASK6  0x00000000
#define REQUIRED_MASK7  0x00000000
#define REQUIRED_MASK8  0x00000000
#define REQUIRED_MASK9  0x00000000
#define REQUIRED_MASK10 0x00000000
#define REQUIRED_MASK11 0x00000000
#define REQUIRED_MASK12 0x00000000
#define REQUIRED_MASK13 0x00000000
#define REQUIRED_MASK14 0x00000000
#define REQUIRED_MASK15 0x00000000
#define REQUIRED_MASK16 0x00000000
#define REQUIRED_MASK17 0x00000000
#define REQUIRED_MASK18 0x00000000
#define REQUIRED_MASK19 0x00000000
#define REQUIRED_MASK20 0x00000000
#define REQUIRED_MASK21 0x00000000

#define REQUIRED_FEATURE(x)                             \
         ((                                              \
                 ((x) >> 5) ==  0 ? REQUIRED_MASK0 :     \
                 ((x) >> 5) ==  1 ? REQUIRED_MASK1 :     \
                 ((x) >> 5) ==  3 ? REQUIRED_MASK3 : 0   \
         ) & (1 << ((x) & 31)))

#define REQUIRED_MASK_BIT_SET(x)                        \
         (REQUIRED_FEATURE(x) || BUILD_BUG_ON_ZERO(NCAPINTS != 22))

/*
  * DISABLED features:
  *
  *    VME K6_MTRR CYRIX_ARR CENTAUR_MCR XENPV TDX_GUEST UNRET LAM SEV_SNP
  */

#define DISABLED_MASK0  0x00000002
#define DISABLED_MASK1  0x00000000
#define DISABLED_MASK2  0x00000000
#define DISABLED_MASK3  0x0000000e
#define DISABLED_MASK4  0x00000000
#define DISABLED_MASK5  0x00000000
#define DISABLED_MASK6  0x00000000
#define DISABLED_MASK7  0x00000000
#define DISABLED_MASK8  0x00410000
#define DISABLED_MASK9  0x00000000
#define DISABLED_MASK10 0x00000000
#define DISABLED_MASK11 0x00008000
#define DISABLED_MASK12 0x04000000
#define DISABLED_MASK13 0x00000000
#define DISABLED_MASK14 0x00000000
#define DISABLED_MASK15 0x00000000
#define DISABLED_MASK16 0x00000000
#define DISABLED_MASK17 0x00000000
#define DISABLED_MASK18 0x00000000
#define DISABLED_MASK19 0x00000010
#define DISABLED_MASK20 0x00000000
#define DISABLED_MASK21 0x00000000

#define DISABLED_FEATURE(x)                             \
         ((                                              \
                 ((x) >> 5) ==  0 ? DISABLED_MASK0 :     \
                 ((x) >> 5) ==  3 ? DISABLED_MASK3 :     \
                 ((x) >> 5) ==  8 ? DISABLED_MASK8 :     \
                 ((x) >> 5) == 11 ? DISABLED_MASK11 :    \
                 ((x) >> 5) == 12 ? DISABLED_MASK12 :    \
                 ((x) >> 5) == 19 ? DISABLED_MASK19 : 0  \
         ) & (1 << ((x) & 31)))

#define DISABLED_MASK_BIT_SET(x)                        \
         (DISABLED_FEATURE(x) || BUILD_BUG_ON_ZERO(NCAPINTS != 22))

#endif /* _ASM_X86_FEATUREMASKS_H */