On 6/17/2024 8:51 PM, Diogo Ivo wrote:
> Add the interrupts needed for PTP Hardware Clock support via IEP
> in SR1.0 devices.
>
> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
> Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com>
> ---
> arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi
> index ef7897763ef8..0a29ed172215 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi
> @@ -73,3 +73,15 @@ &icssg0_eth {
> "rx0", "rx1",
> "rxmgm0", "rxmgm1";
> };
> +
> +&icssg0_iep0 {
> + interrupt-parent = <&icssg0_intc>;
> + interrupts = <7 7 7>;
> + interrupt-names = "iep_cap_cmp";
> +};
> +
> +&icssg0_iep1 {
> + interrupt-parent = <&icssg0_intc>;
> + interrupts = <56 8 8>;
> + interrupt-names = "iep_cap_cmp";
> +};
>
Reviewed-by: MD Danish Anwar <danishanwar@ti.com>
--
Thanks and Regards,
Md Danish Anwar