The affected processor table has a lot of repetition and redundant
information that can be omitted. For example:
VULNBL_INTEL_STEPPINGS(INTEL_IVYBRIDGE, X86_STEPPING_ANY, SRBDS),
can easily be simplified to:
VULNBL_INTEL(IVYBRIDGE, SRBDS),
Apply this to all the entries in the affected processor table.
No functional change.
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
---
arch/x86/kernel/cpu/common.c | 133 ++++++++++++++++++++++---------------------
1 file changed, 69 insertions(+), 64 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d4e539d4e158..7e3b09b0f82c 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1128,7 +1128,7 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, whitelist)
#define VULNWL_INTEL(vfm, whitelist) \
- X86_MATCH_VFM(vfm, whitelist)
+ X86_MATCH_VFM(INTEL_##vfm, whitelist)
#define VULNWL_AMD(family, whitelist) \
VULNWL(AMD, family, X86_MODEL_ANY, whitelist)
@@ -1145,32 +1145,32 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
VULNWL(VORTEX, 6, X86_MODEL_ANY, NO_SPECULATION),
/* Intel Family 6 */
- VULNWL_INTEL(INTEL_TIGERLAKE, NO_MMIO),
- VULNWL_INTEL(INTEL_TIGERLAKE_L, NO_MMIO),
- VULNWL_INTEL(INTEL_ALDERLAKE, NO_MMIO),
- VULNWL_INTEL(INTEL_ALDERLAKE_L, NO_MMIO),
+ VULNWL_INTEL(TIGERLAKE, NO_MMIO),
+ VULNWL_INTEL(TIGERLAKE_L, NO_MMIO),
+ VULNWL_INTEL(ALDERLAKE, NO_MMIO),
+ VULNWL_INTEL(ALDERLAKE_L, NO_MMIO),
- VULNWL_INTEL(INTEL_ATOM_SALTWELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_SALTWELL_TABLET, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_SALTWELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_BONNELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_BONNELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_SALTWELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_SALTWELL_TABLET, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_SALTWELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_BONNELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_BONNELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_SILVERMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_SILVERMONT_D, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_SILVERMONT_MID, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_AIRMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_XEON_PHI_KNL, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_XEON_PHI_KNM, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_SILVERMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_SILVERMONT_D, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_SILVERMONT_MID, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_AIRMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(XEON_PHI_KNL, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(XEON_PHI_KNM, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_CORE_YONAH, NO_SSB),
+ VULNWL_INTEL(CORE_YONAH, NO_SSB),
- VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP, NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(ATOM_AIRMONT_NP, NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
- VULNWL_INTEL(INTEL_ATOM_GOLDMONT_D, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
- VULNWL_INTEL(INTEL_ATOM_GOLDMONT_PLUS, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),
+ VULNWL_INTEL(ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
+ VULNWL_INTEL(ATOM_GOLDMONT_D, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
+ VULNWL_INTEL(ATOM_GOLDMONT_PLUS, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),
/*
* Technically, swapgs isn't serializing on AMD (despite it previously
@@ -1180,9 +1180,9 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
* good enough for our purposes.
*/
- VULNWL_INTEL(INTEL_ATOM_TREMONT, NO_EIBRS_PBRSB),
- VULNWL_INTEL(INTEL_ATOM_TREMONT_L, NO_EIBRS_PBRSB),
- VULNWL_INTEL(INTEL_ATOM_TREMONT_D, NO_ITLB_MULTIHIT | NO_EIBRS_PBRSB),
+ VULNWL_INTEL(ATOM_TREMONT, NO_EIBRS_PBRSB),
+ VULNWL_INTEL(ATOM_TREMONT_L, NO_EIBRS_PBRSB),
+ VULNWL_INTEL(ATOM_TREMONT_D, NO_ITLB_MULTIHIT | NO_EIBRS_PBRSB),
/* AMD Family 0xf - 0x12 */
VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_BHI),
@@ -1203,8 +1203,11 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
#define VULNBL(vendor, family, model, blacklist) \
X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, blacklist)
-#define VULNBL_INTEL_STEPPINGS(vfm, steppings, issues) \
- X86_MATCH_VFM_STEPPINGS(vfm, steppings, issues)
+#define VULNBL_INTEL(vfm, issues) \
+ X86_MATCH_VFM(INTEL_##vfm, issues)
+
+#define VULNBL_INTEL_STEPPINGS(vfm, steppings, issues) \
+ X86_MATCH_VFM_STEPPINGS(INTEL_##vfm, steppings, issues)
#define VULNBL_AMD(family, blacklist) \
VULNBL(AMD, family, X86_MODEL_ANY, blacklist)
@@ -1229,43 +1232,45 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
#define RFDS BIT(7)
static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
- VULNBL_INTEL_STEPPINGS(INTEL_IVYBRIDGE, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_HASWELL, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_L, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_G, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_X, X86_STEPPING_ANY, MMIO),
- VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPING_ANY, MMIO),
- VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_G, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_X, X86_STEPPING_ANY, MMIO),
- VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(INTEL_CANNONLAKE_L, X86_STEPPING_ANY, RETBLEED),
- VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPING_ANY, MMIO | GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPINGS(0x0, 0x0), MMIO | RETBLEED),
- VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE_L, X86_STEPPING_ANY, GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE, X86_STEPPING_ANY, GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_LAKEFIELD, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED),
- VULNBL_INTEL_STEPPINGS(INTEL_ROCKETLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE_L, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_P, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_S, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GRACEMONT, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO | RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_D, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL(IVYBRIDGE, SRBDS),
+ VULNBL_INTEL(HASWELL, SRBDS),
+ VULNBL_INTEL(HASWELL_L, SRBDS),
+ VULNBL_INTEL(HASWELL_G, SRBDS),
+ VULNBL_INTEL(HASWELL_X, MMIO),
+ VULNBL_INTEL(BROADWELL_D, MMIO),
+ VULNBL_INTEL(BROADWELL_G, SRBDS),
+ VULNBL_INTEL(BROADWELL_X, MMIO),
+ VULNBL_INTEL(BROADWELL, SRBDS),
+ VULNBL_INTEL(SKYLAKE_X, MMIO | RETBLEED | GDS),
+ VULNBL_INTEL(SKYLAKE_L, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL(SKYLAKE, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL(KABYLAKE_L, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL(KABYLAKE, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL(CANNONLAKE_L, RETBLEED),
+ VULNBL_INTEL(ICELAKE_L, MMIO | MMIO_SBDS | RETBLEED | GDS),
+ VULNBL_INTEL(ICELAKE_D, MMIO | GDS),
+ VULNBL_INTEL(ICELAKE_X, MMIO | GDS),
+ VULNBL_INTEL(COMETLAKE, MMIO | MMIO_SBDS | RETBLEED | GDS),
+ VULNBL_INTEL(TIGERLAKE_L, GDS),
+ VULNBL_INTEL(TIGERLAKE, GDS),
+ VULNBL_INTEL(LAKEFIELD, MMIO | MMIO_SBDS | RETBLEED),
+ VULNBL_INTEL(ROCKETLAKE, MMIO | RETBLEED | GDS),
+ VULNBL_INTEL(ALDERLAKE, RFDS),
+ VULNBL_INTEL(ALDERLAKE_L, RFDS),
+ VULNBL_INTEL(RAPTORLAKE, RFDS),
+ VULNBL_INTEL(RAPTORLAKE_P, RFDS),
+ VULNBL_INTEL(RAPTORLAKE_S, RFDS),
+ VULNBL_INTEL(ATOM_GRACEMONT, RFDS),
+ VULNBL_INTEL(ATOM_TREMONT, MMIO | MMIO_SBDS | RFDS),
+ VULNBL_INTEL(ATOM_TREMONT_D, MMIO | RFDS),
+ VULNBL_INTEL(ATOM_TREMONT_L, MMIO | MMIO_SBDS | RFDS),
+ VULNBL_INTEL(ATOM_GOLDMONT, RFDS),
+ VULNBL_INTEL(ATOM_GOLDMONT_D, RFDS),
+ VULNBL_INTEL(ATOM_GOLDMONT_PLUS, RFDS),
+
+ /* Match more than Vendor/Family/Model */
+ VULNBL_INTEL_STEPPINGS(COMETLAKE_L, X86_STEPPINGS(0x0, 0x0), MMIO | RETBLEED),
+ VULNBL_INTEL (COMETLAKE_L, MMIO | MMIO_SBDS | RETBLEED | GDS),
VULNBL_AMD(0x15, RETBLEED),
VULNBL_AMD(0x16, RETBLEED),
--
2.34.1On 6/17/24 02:12, Pawan Gupta wrote: > No functional change. It would make me feel a *lot* better if you also dumped the before and after binaries and made sure they're identical.
On Mon, Jun 17, 2024 at 07:13:15AM -0700, Dave Hansen wrote: > On 6/17/24 02:12, Pawan Gupta wrote: > > No functional change. > > It would make me feel a *lot* better if you also dumped the before and > after binaries and made sure they're identical. Verified that they are identical. Adding this dump to the changelog: $ size vmlinux.before vmlinux.after text data bss dec hex filename 33128289 23039446 19767300 75935035 486ad3b vmlinux.before 33128289 23039446 19767300 75935035 486ad3b vmlinux.after
> $ size vmlinux.before vmlinux.after > text data bss dec hex filename > 33128289 23039446 19767300 75935035 486ad3b vmlinux.before > 33128289 23039446 19767300 75935035 486ad3b vmlinux.after Same size != same contents. What if you: $ cmp -l arch/x86/kernel/cpu/before-common.o arch/x86/kernel/cpu/after-common.o Or $ diff <(objdump -d arch/x86/kernel/cpu/before-common.o) <(objdump -d arch/x86/kernel/cpu/after-common.o) -Tony
On Tue, Jun 18, 2024 at 12:08:18AM +0000, Luck, Tony wrote: > > $ size vmlinux.before vmlinux.after > > text data bss dec hex filename > > 33128289 23039446 19767300 75935035 486ad3b vmlinux.before > > 33128289 23039446 19767300 75935035 486ad3b vmlinux.after > > Same size != same contents. Right. I did get that thought, but did not act on it :\ > What if you: > > $ cmp -l arch/x86/kernel/cpu/before-common.o arch/x86/kernel/cpu/after-common.o > > Or > > $ diff <(objdump -d arch/x86/kernel/cpu/before-common.o) <(objdump -d arch/x86/kernel/cpu/after-common.o) Thanks for pointers. I am not seeing any difference in the disassembly too.
On Mon, Jun 17, 2024 at 07:13:15AM -0700, Dave Hansen wrote: > On 6/17/24 02:12, Pawan Gupta wrote: > > No functional change. > > It would make me feel a *lot* better if you also dumped the before and > after binaries and made sure they're identical. Right, will do.
On 17/06/2024 10:12 am, Pawan Gupta wrote:
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index d4e539d4e158..7e3b09b0f82c 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1229,43 +1232,45 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
> #define RFDS BIT(7)
>
> static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
> - VULNBL_INTEL_STEPPINGS(INTEL_IVYBRIDGE, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_L, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_G, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_X, X86_STEPPING_ANY, MMIO),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPING_ANY, MMIO),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_G, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_X, X86_STEPPING_ANY, MMIO),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_CANNONLAKE_L, X86_STEPPING_ANY, RETBLEED),
> - VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPING_ANY, MMIO | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPINGS(0x0, 0x0), MMIO | RETBLEED),
> - VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE_L, X86_STEPPING_ANY, GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE, X86_STEPPING_ANY, GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_LAKEFIELD, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED),
> - VULNBL_INTEL_STEPPINGS(INTEL_ROCKETLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE_L, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_P, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_S, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GRACEMONT, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO | RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_D, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY, RFDS),
> + VULNBL_INTEL(IVYBRIDGE, SRBDS),
> + VULNBL_INTEL(HASWELL, SRBDS),
> + VULNBL_INTEL(HASWELL_L, SRBDS),
> + VULNBL_INTEL(HASWELL_G, SRBDS),
> + VULNBL_INTEL(HASWELL_X, MMIO),
> + VULNBL_INTEL(BROADWELL_D, MMIO),
> + VULNBL_INTEL(BROADWELL_G, SRBDS),
> + VULNBL_INTEL(BROADWELL_X, MMIO),
> + VULNBL_INTEL(BROADWELL, SRBDS),
> + VULNBL_INTEL(SKYLAKE_X, MMIO | RETBLEED | GDS),
> + VULNBL_INTEL(SKYLAKE_L, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(SKYLAKE, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(KABYLAKE_L, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(KABYLAKE, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(CANNONLAKE_L, RETBLEED),
> + VULNBL_INTEL(ICELAKE_L, MMIO | MMIO_SBDS | RETBLEED | GDS),
> + VULNBL_INTEL(ICELAKE_D, MMIO | GDS),
> + VULNBL_INTEL(ICELAKE_X, MMIO | GDS),
> + VULNBL_INTEL(COMETLAKE, MMIO | MMIO_SBDS | RETBLEED | GDS),
> + VULNBL_INTEL(TIGERLAKE_L, GDS),
> + VULNBL_INTEL(TIGERLAKE, GDS),
> + VULNBL_INTEL(LAKEFIELD, MMIO | MMIO_SBDS | RETBLEED),
> + VULNBL_INTEL(ROCKETLAKE, MMIO | RETBLEED | GDS),
> + VULNBL_INTEL(ALDERLAKE, RFDS),
> + VULNBL_INTEL(ALDERLAKE_L, RFDS),
> + VULNBL_INTEL(RAPTORLAKE, RFDS),
> + VULNBL_INTEL(RAPTORLAKE_P, RFDS),
> + VULNBL_INTEL(RAPTORLAKE_S, RFDS),
> + VULNBL_INTEL(ATOM_GRACEMONT, RFDS),
> + VULNBL_INTEL(ATOM_TREMONT, MMIO | MMIO_SBDS | RFDS),
> + VULNBL_INTEL(ATOM_TREMONT_D, MMIO | RFDS),
> + VULNBL_INTEL(ATOM_TREMONT_L, MMIO | MMIO_SBDS | RFDS),
> + VULNBL_INTEL(ATOM_GOLDMONT, RFDS),
> + VULNBL_INTEL(ATOM_GOLDMONT_D, RFDS),
> + VULNBL_INTEL(ATOM_GOLDMONT_PLUS, RFDS),
Take the opportunity to realign and fix this ?
~Andrew
On Mon, Jun 17, 2024 at 10:38:32AM +0100, Andrew Cooper wrote: [...] > > + VULNBL_INTEL(IVYBRIDGE, SRBDS), > > + VULNBL_INTEL(HASWELL, SRBDS), > > + VULNBL_INTEL(HASWELL_L, SRBDS), > > + VULNBL_INTEL(HASWELL_G, SRBDS), > > + VULNBL_INTEL(HASWELL_X, MMIO), > > + VULNBL_INTEL(BROADWELL_D, MMIO), > > + VULNBL_INTEL(BROADWELL_G, SRBDS), > > + VULNBL_INTEL(BROADWELL_X, MMIO), > > + VULNBL_INTEL(BROADWELL, SRBDS), > > + VULNBL_INTEL(SKYLAKE_X, MMIO | RETBLEED | GDS), > > + VULNBL_INTEL(SKYLAKE_L, MMIO | RETBLEED | GDS | SRBDS), > > + VULNBL_INTEL(SKYLAKE, MMIO | RETBLEED | GDS | SRBDS), > > + VULNBL_INTEL(KABYLAKE_L, MMIO | RETBLEED | GDS | SRBDS), > > + VULNBL_INTEL(KABYLAKE, MMIO | RETBLEED | GDS | SRBDS), > > + VULNBL_INTEL(CANNONLAKE_L, RETBLEED), > > + VULNBL_INTEL(ICELAKE_L, MMIO | MMIO_SBDS | RETBLEED | GDS), > > + VULNBL_INTEL(ICELAKE_D, MMIO | GDS), > > + VULNBL_INTEL(ICELAKE_X, MMIO | GDS), > > + VULNBL_INTEL(COMETLAKE, MMIO | MMIO_SBDS | RETBLEED | GDS), > > + VULNBL_INTEL(TIGERLAKE_L, GDS), > > + VULNBL_INTEL(TIGERLAKE, GDS), > > + VULNBL_INTEL(LAKEFIELD, MMIO | MMIO_SBDS | RETBLEED), > > + VULNBL_INTEL(ROCKETLAKE, MMIO | RETBLEED | GDS), > > + VULNBL_INTEL(ALDERLAKE, RFDS), > > + VULNBL_INTEL(ALDERLAKE_L, RFDS), > > + VULNBL_INTEL(RAPTORLAKE, RFDS), > > + VULNBL_INTEL(RAPTORLAKE_P, RFDS), > > + VULNBL_INTEL(RAPTORLAKE_S, RFDS), > > + VULNBL_INTEL(ATOM_GRACEMONT, RFDS), > > + VULNBL_INTEL(ATOM_TREMONT, MMIO | MMIO_SBDS | RFDS), > > + VULNBL_INTEL(ATOM_TREMONT_D, MMIO | RFDS), > > + VULNBL_INTEL(ATOM_TREMONT_L, MMIO | MMIO_SBDS | RFDS), > > + VULNBL_INTEL(ATOM_GOLDMONT, RFDS), > > + VULNBL_INTEL(ATOM_GOLDMONT_D, RFDS), > > + VULNBL_INTEL(ATOM_GOLDMONT_PLUS, RFDS), > > Take the opportunity to realign and fix this ? I assume by also adding a tab to all the other entries?
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