[PATCH] x86/CPU/AMD: inline amd_clear_divider

Mateusz Guzik posted 1 patch 1 year, 8 months ago
arch/x86/include/asm/processor.h | 12 +++++++++++-
arch/x86/kernel/cpu/amd.c        | 11 -----------
2 files changed, 11 insertions(+), 12 deletions(-)
[PATCH] x86/CPU/AMD: inline amd_clear_divider
Posted by Mateusz Guzik 1 year, 8 months ago
The routine is used on syscall exit and on non-AMD CPUs is guaranteed to
be empty.

It probably does not need to be a func call even on CPUs which do need
the mitigation.

Signed-off-by: Mateusz Guzik <mjguzik@gmail.com>
---

This is a random tidbit I spotted at the bottom of the profile while
looking at something else, I did not bother benchmarking the change --
not sneaking in a func call to syscall exit should not require a
justification. :)

I am assuming the ALTERNATIVE mechanism does work fine for inlined
routines.

I am not going to argue for the change. If you don't want it altogether
that's it.

If there are cosmetic touch ups you want done here I would appreciate if
you just did them yourself, I merely copied a chunk elsewhere.

cheers

 arch/x86/include/asm/processor.h | 12 +++++++++++-
 arch/x86/kernel/cpu/amd.c        | 11 -----------
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index cb4f6c513c48..7a1f741df8f1 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -692,7 +692,17 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu)
 
 #ifdef CONFIG_CPU_SUP_AMD
 extern u32 amd_get_highest_perf(void);
-extern void amd_clear_divider(void);
+
+/*
+ * Issue a DIV 0/1 insn to clear any division data from previous DIV
+ * operations.
+ */
+static inline void amd_clear_divider(void)
+{
+	asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0)
+		     :: "a" (0), "d" (0), "r" (1));
+}
+
 extern void amd_check_microcode(void);
 #else
 static inline u32 amd_get_highest_perf(void)		{ return 0; }
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 44df3f11e731..be5889bded49 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1220,14 +1220,3 @@ void amd_check_microcode(void)
 
 	on_each_cpu(zenbleed_check_cpu, NULL, 1);
 }
-
-/*
- * Issue a DIV 0/1 insn to clear any division data from previous DIV
- * operations.
- */
-void noinstr amd_clear_divider(void)
-{
-	asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0)
-		     :: "a" (0), "d" (0), "r" (1));
-}
-EXPORT_SYMBOL_GPL(amd_clear_divider);
-- 
2.43.0
[tip: x86/cpu] x86/CPU/AMD: Always inline amd_clear_divider()
Posted by tip-bot2 for Mateusz Guzik 1 year, 8 months ago
The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     501bd734f933f4eb5c080b87936e9d43f471d723
Gitweb:        https://git.kernel.org/tip/501bd734f933f4eb5c080b87936e9d43f471d723
Author:        Mateusz Guzik <mjguzik@gmail.com>
AuthorDate:    Thu, 13 Jun 2024 10:26:37 +02:00
Committer:     Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Thu, 13 Jun 2024 14:40:29 +02:00

x86/CPU/AMD: Always inline amd_clear_divider()

The routine is used on syscall exit and on non-AMD CPUs is guaranteed to
be empty.

It probably does not need to be a function call even on CPUs which do need the
mitigation.

  [ bp: Make sure it is always inlined so that noinstr marking works. ]

Signed-off-by: Mateusz Guzik <mjguzik@gmail.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20240613082637.659133-1-mjguzik@gmail.com
---
 arch/x86/include/asm/processor.h | 12 +++++++++++-
 arch/x86/kernel/cpu/amd.c        | 11 -----------
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index cb4f6c5..a75a07f 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -692,7 +692,17 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu)
 
 #ifdef CONFIG_CPU_SUP_AMD
 extern u32 amd_get_highest_perf(void);
-extern void amd_clear_divider(void);
+
+/*
+ * Issue a DIV 0/1 insn to clear any division data from previous DIV
+ * operations.
+ */
+static __always_inline void amd_clear_divider(void)
+{
+	asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0)
+		     :: "a" (0), "d" (0), "r" (1));
+}
+
 extern void amd_check_microcode(void);
 #else
 static inline u32 amd_get_highest_perf(void)		{ return 0; }
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 44df3f1..be5889b 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1220,14 +1220,3 @@ void amd_check_microcode(void)
 
 	on_each_cpu(zenbleed_check_cpu, NULL, 1);
 }
-
-/*
- * Issue a DIV 0/1 insn to clear any division data from previous DIV
- * operations.
- */
-void noinstr amd_clear_divider(void)
-{
-	asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0)
-		     :: "a" (0), "d" (0), "r" (1));
-}
-EXPORT_SYMBOL_GPL(amd_clear_divider);