Fix the alphabetical ordering in some nodes and rename some regulators
and pins to match the schematics [1][2] as well as to adhere to
preferred naming schemes.
In addition to that:
* vcc_3v3_sd_s0: Fix voltage to be 3.3V
* vcc3v3_pcie:
- Move to NanoPi R6C, this power switch is not available on R6S
- Fix vin-supply (is vcc_5v0 per schematics)
- Add gpios/pincrtl to enable power
* vcc5v0_usb: Remove this regulator since according to the schematics,
vcc5v0_host_20 and vcc5v0_usb_otg0 are directly powered by vcc_5v0
* gmac1: Add rx_delay of 0 (no delay since phy-mode = "rgmii-rxid")
* rgmii_phy1: Add phy-supply as seen in schematics
* pcie2*:
- Add pinctrl reset pins
- Update vpcie3v3-supply to match the schematics
* sdhci: Add vmmc-supply and vqmmc-supply
Links:
[1] https://wiki.friendlyelec.com/wiki/images/f/f7/NanoPi_R6C_2302_SCH.PDF
[2] https://wiki.friendlyelec.com/wiki/images/2/2f/NanoPi_R6S_2208_SCH.PDF
Fixes: f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
---
I didn't want to spam many patches with small fixes/improvements, so
this one patch includes lots of small changes. Let me know if another
method is preferred :)
---
.../boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 169 +++++++++---------
.../boot/dts/rockchip/rk3588s-nanopi-r6c.dts | 28 +++
.../boot/dts/rockchip/rk3588s-nanopi-r6s.dts | 5 +
3 files changed, 122 insertions(+), 80 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index e68d4071400e..8b90bae28302 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -21,7 +21,7 @@ chosen {
stdout-path = "serial2:1500000n8";
};
- adc-keys {
+ adc-key-maskrom {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
@@ -41,10 +41,10 @@ gpio-keys {
pinctrl-0 = <&key1_pin>;
button-user {
- label = "User";
- linux,code = <BTN_1>;
- gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
debounce-interval = <50>;
+ gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
+ label = "User Button";
+ linux,code = <BTN_1>;
};
};
@@ -80,26 +80,27 @@ lan2_led: led-3 {
};
};
- vcc5v0_sys: vcc5v0-sys-regulator {
+ vcc_5v0: regulator-vcc-5v0 {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0";
};
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
+ regulator-name = "vcc_1v1_nldo_s3";
+ vin-supply = <&vcc_5v0>;
};
- vcc_3v3_s0: vcc-3v3-s0-regulator {
+ /* SY6280AAC power switch (U3824 in schematics) */
+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
@@ -109,61 +110,45 @@ vcc_3v3_s0: vcc-3v3-s0-regulator {
vin-supply = <&vcc_3v3_s3>;
};
- vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
+ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sd_s0_pwr>;
- regulator-name = "vcc_3v3_sd_s0";
- regulator-boot-on;
- regulator-max-microvolt = <3000000>;
- regulator-min-microvolt = <3000000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_3v3_pcie20";
- regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_sd_s0";
vin-supply = <&vcc_3v3_s3>;
};
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator {
+ /* SY6280AAC power switch (U9539 in schematics) */
+ /* For USB 2.0 Type-A port */
+ vcc_5v0_host_20: regulator-vcc-5v0-host-20 {
compatible = "regulator-fixed";
enable-active-high;
- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
- pinctrl-0 = <&typec5v_pwren>;
- regulator-name = "vcc5v0_usb_otg0";
+ pinctrl-0 = <&usb_host_pwren_h>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
+ regulator-name = "vcc_5v0_host_20";
+ vin-supply = <&vcc_5v0>;
};
- vcc5v0_host_20: vcc5v0-host-20-regulator {
+ /* SY6280AAC power switch (U9538 in schematics) */
+ /* For USB 3.0 Type-A port */
+ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
compatible = "regulator-fixed";
enable-active-high;
- gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host20_en>;
- regulator-name = "vcc5v0_host_20";
+ pinctrl-0 = <&typec5v_pwren_h>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
+ regulator-name = "vcc5v0_usb_otg0";
+ vin-supply = <&vcc_5v0>;
};
};
@@ -211,12 +196,13 @@ &gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-rxid";
+ pinctrl-names = "default";
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus>;
- pinctrl-names = "default";
+ rx_delay = <0x00>;
tx_delay = <0x42>;
status = "okay";
};
@@ -230,13 +216,13 @@ vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
+ regulator-name = "vdd_cpu_big0_s0";
regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
+ vin-supply = <&vcc_5v0>;
regulator-state-mem {
regulator-off-in-suspend;
@@ -247,13 +233,13 @@ vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
+ regulator-name = "vdd_cpu_big1_s0";
regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
+ vin-supply = <&vcc_5v0>;
regulator-state-mem {
regulator-off-in-suspend;
@@ -268,13 +254,13 @@ vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
+ regulator-always-on;
+ regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_npu_s0";
regulator-ramp-delay = <2300>;
- regulator-boot-on;
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
+ vin-supply = <&vcc_5v0>;
regulator-state-mem {
regulator-off-in-suspend;
@@ -293,35 +279,43 @@ hym8563: rtc@51 {
reg = <0x51>;
#clock-cells = <0>;
clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int>;
wakeup-source;
};
};
+/* RTL8211F-CG Ethernet */
&mdio1 {
rgmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id001c.c916";
reg = <0x1>;
+ phy-supply = <&vcc_3v3_s0>;
pinctrl-names = "default";
- pinctrl-0 = <&rtl8211f_rst>;
+ pinctrl-0 = <&gmac1_rstn_l>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
};
+/* RTL8125BG Ethernet */
&pcie2x1l1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie20x1_1_perstn_m2>;
reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_pcie20>;
+ vpcie3v3-supply = <&vcc_3v3_s3>;
status = "okay";
};
+/* R6C: M.2 M-Key socket */
+/* R6S: RTL8125BG Ethernet */
&pcie2x1l2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie20x1_2_perstn_m0>;
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
};
@@ -360,24 +354,34 @@ rtc_int: rtc-int {
};
};
+ pcie {
+ pcie20x1_1_perstn_m2: pcie2x1-1-rst {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie20x1_2_perstn_m0: pcie2x1-2-rst {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
- sd_s0_pwr: sd-s0-pwr {
+ sd_s0_pwr: sd-pwr {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
- typec5v_pwren: typec5v-pwren {
+ typec5v_pwren_h: usb3-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
- vcc5v0_host20_en: vcc5v0-host20-en {
+ usb_host_pwren_h: usb2-pwren {
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rtl8211f {
- rtl8211f_rst: rtl8211f-rst {
+ gmac1_rstn_l: rtl8211f-rst {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -388,15 +392,19 @@ &saradc {
status = "okay";
};
+/* eMMC */
&sdhci {
bus-width = <8>;
- no-sdio;
+ mmc-hs200-1_8v;
no-sd;
+ no-sdio;
non-removable;
- mmc-hs200-1_8v;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vcc_1v8_s3>;
status = "okay";
};
+/* microSD card */
&sdmmc {
bus-width = <4>;
cap-sd-highspeed;
@@ -411,16 +419,15 @@ &sdmmc {
};
&spi2 {
- status = "okay";
assigned-clocks = <&cru CLK_SPI2>;
assigned-clock-rates = <200000000>;
+ num-cs = <1>;
pinctrl-names = "default";
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- num-cs = <1>;
+ status = "okay";
- pmic@0 {
+ rk806_single: pmic@0 {
compatible = "rockchip,rk806";
- spi-max-frequency = <1000000>;
reg = <0x0>;
interrupt-parent = <&gpio0>;
@@ -430,23 +437,24 @@ pmic@0 {
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency = <1000000>;
system-power-controller;
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
+ vcc1-supply = <&vcc_5v0>;
+ vcc2-supply = <&vcc_5v0>;
+ vcc3-supply = <&vcc_5v0>;
+ vcc4-supply = <&vcc_5v0>;
+ vcc5-supply = <&vcc_5v0>;
+ vcc6-supply = <&vcc_5v0>;
+ vcc7-supply = <&vcc_5v0>;
+ vcc8-supply = <&vcc_5v0>;
+ vcc9-supply = <&vcc_5v0>;
+ vcc10-supply = <&vcc_5v0>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
+ vcc12-supply = <&vcc_5v0>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
+ vcca-supply = <&vcc_5v0>;
gpio-controller;
#gpio-cells = <2>;
@@ -745,10 +753,11 @@ &u2phy2 {
};
&u2phy2_host {
- phy-supply = <&vcc5v0_host_20>;
+ phy-supply = <&vcc_5v0_host_20>;
status = "okay";
};
+/* Debug UART */
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts
index ccc5e4627517..24dcd3e07ea7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts
@@ -7,8 +7,36 @@
/ {
model = "FriendlyElec NanoPi R6C";
compatible = "friendlyarm,nanopi-r6c", "rockchip,rk3588s";
+
+ /* MP2143DJ power switch (U9536 in schematics) */
+ vcc3v3_pcie: regulator-vcc3v3-pcie {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie20x1_2_con_pwren>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3_pcie";
+ vin-supply = <&vcc_5v0>;
+ };
};
&lan2_led {
label = "user_led";
};
+
+/* M.2 M-Key socket */
+&pcie2x1l2 {
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+};
+
+&pinctrl {
+ pcie {
+ pcie20x1_2_con_pwren: pcie20x1-2-con-pwren {
+ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
index 9c3e0b0daaac..d24110b6cf5d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
@@ -12,3 +12,8 @@ / {
&lan2_led {
label = "lan2_led";
};
+
+/* RTL8125BG Ethernet */
+&pcie2x1l2 {
+ vpcie3v3-supply = <&vcc_3v3_s3>;
+};
--
2.43.0Am Mittwoch, 12. Juni 2024, 22:48:11 CEST schrieb Sebastian Kropatsch: > Fix the alphabetical ordering in some nodes and rename some regulators > and pins to match the schematics [1][2] as well as to adhere to > preferred naming schemes. General rule of thumb, when you need an "and" in your subject or a list like the above - you definitly want to split the change into multiple commits. > In addition to that: > * vcc_3v3_sd_s0: Fix voltage to be 3.3V > * vcc3v3_pcie: > - Move to NanoPi R6C, this power switch is not available on R6S > - Fix vin-supply (is vcc_5v0 per schematics) > - Add gpios/pincrtl to enable power this defnitly needs its own patch > * vcc5v0_usb: Remove this regulator since according to the schematics, this too > * vcc5v0_host_20 and vcc5v0_usb_otg0 are directly powered by vcc_5v0 this could be grouped together with the 3.3v change > * gmac1: Add rx_delay of 0 (no delay since phy-mode = "rgmii-rxid") with rxid mode, why is the rx_delay needed at all? Shouldn't this just work without the property? > * rgmii_phy1: Add phy-supply as seen in schematics separate patch > * pcie2*: > - Add pinctrl reset pins > - Update vpcie3v3-supply to match the schematics separate patch > * sdhci: Add vmmc-supply and vqmmc-supply separate patch Heiko
Hello, Am 20.06.2024 um 20:39 schrieb Heiko Stübner: > Am Mittwoch, 12. Juni 2024, 22:48:11 CEST schrieb Sebastian Kropatsch: >> Fix the alphabetical ordering in some nodes and rename some regulators >> and pins to match the schematics [1][2] as well as to adhere to >> preferred naming schemes. > > General rule of thumb, when you need an "and" in your subject or a list > like the above - you definitly want to split the change into multiple > commits. Thanks for the advice! I wasn't sure and didn't want to spam the list. Also, my email provider only allows a limited number of emails to be sent every day (series with 5 patches, with 9 recipients = 45 emails sent). So I might have to send the patch series by spanning the different patches over multiple days. If anyone knows an email provider which is better suited for this kind of open source work/mailing lists and is also privacy respecting, please let me know :) I will definitely split these changes into separate commits. >> In addition to that: >> * vcc_3v3_sd_s0: Fix voltage to be 3.3V >> * vcc3v3_pcie: >> - Move to NanoPi R6C, this power switch is not available on R6S >> - Fix vin-supply (is vcc_5v0 per schematics) >> - Add gpios/pincrtl to enable power > > this defnitly needs its own patch > >> * vcc5v0_usb: Remove this regulator since according to the schematics, > > this too > >> * vcc5v0_host_20 and vcc5v0_usb_otg0 are directly powered by vcc_5v0 > > this could be grouped together with the 3.3v change > >> * gmac1: Add rx_delay of 0 (no delay since phy-mode = "rgmii-rxid") > > with rxid mode, why is the rx_delay needed at all? > Shouldn't this just work without the property? In theory yes, but with the property missing, you'll get a warning message in dmesg which says: Can not read property: rx_delay. Set rx_delay to 0x10 So it will set the rx_delay to a value which is not 0, even if rxid mode is selected. I guess this is something which can be fixed in the driver, but that may be beyond my abilities. Setting the rx_delay to 0 gets rid of this warning, so it seems to be a viable workaround. >> * rgmii_phy1: Add phy-supply as seen in schematics > > separate patch > >> * pcie2*: >> - Add pinctrl reset pins >> - Update vpcie3v3-supply to match the schematics > > separate patch > >> * sdhci: Add vmmc-supply and vqmmc-supply > > separate patch > Thanks, Sebastian
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