From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Document the components used to boot the ADSP, CDSP0, CDSP1, GPDSP0 and
GPDSP1 on the SA8775p SoC.
Co-developed-by: Tengfei Fan <quic_tengfan@quicinc.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
.../bindings/remoteproc/qcom,sa8775p-pas.yaml | 177 +++++++++++++++++++++
1 file changed, 177 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
new file mode 100644
index 000000000000..77a5e11555de
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
@@ -0,0 +1,177 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SA8775p Peripheral Authentication Service
+
+maintainers:
+ - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+
+description:
+ Qualcomm SA8775p SoC Peripheral Authentication Service loads and boots firmware
+ on the Qualcomm DSP Hexagon cores.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sa8775p-adsp-pas
+ - qcom,sa8775p-cdsp0-pas
+ - qcom,sa8775p-cdsp1-pas
+ - qcom,sa8775p-gpdsp0-pas
+ - qcom,sa8775p-gpdsp1-pas
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: XO clock
+
+ clock-names:
+ items:
+ - const: xo
+
+ qcom,qmp:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Reference to the AOSS side-channel message RAM.
+
+ firmware-name:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ items:
+ - description: Firmware name of the Hexagon core
+
+ memory-region:
+ items:
+ - description: Memory region for main Firmware authentication
+
+ interrupts:
+ maxItems: 5
+
+ interrupt-names:
+ maxItems: 5
+
+required:
+ - compatible
+ - reg
+ - memory-region
+
+allOf:
+ - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,sa8775p-adsp-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: LCX power domain
+ - description: LMX power domain
+ power-domain-names:
+ items:
+ - const: lcx
+ - const: lmx
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,sa8775p-cdsp-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MXC power domain
+ - description: NSP0 power domain
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mxc
+ - const: nsp0
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,sa8775p-cdsp1-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MXC power domain
+ - description: NSP1 power domain
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mxc
+ - const: nsp1
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,sa8775p-gpdsp0-pas
+ - qcom,sa8775p-gpdsp1-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MXC power domain
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mxc
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/mailbox/qcom-ipcc.h>
+ #include <dt-bindings/power/qcom,rpmhpd.h>
+
+ remoteproc@30000000 {
+ compatible = "qcom,sa8775p-adsp-pas";
+ reg = <0x30000000 0x100>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd RPMHPD_LCX>, <&rpmhpd RPMHPD_LMX>;
+ power-domain-names = "lcx", "lmx";
+
+ interconnects = <&lpass_ag_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>;
+
+ memory-region = <&pil_adsp_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <2>;
+ };
+ };
--
2.43.0On 27/05/2024 10:43, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Document the components used to boot the ADSP, CDSP0, CDSP1, GPDSP0 and > GPDSP1 on the SA8775p SoC. > > Co-developed-by: Tengfei Fan <quic_tengfan@quicinc.com> Missing SoB. > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> ... > + > +allOf: > + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# > + > + - if: > + properties: > + compatible: > + enum: > + - qcom,sa8775p-adsp-pas > + then: > + properties: > + power-domains: > + items: > + - description: LCX power domain > + - description: LMX power domain > + power-domain-names: > + items: > + - const: lcx > + - const: lmx > + > + - if: > + properties: > + compatible: > + enum: > + - qcom,sa8775p-cdsp-pas cdsp0 > + then: > + properties: > + power-domains: > + items: > + - description: CX power domain > + - description: MXC power domain > + - description: NSP0 power domain > + power-domain-names: > + items: > + - const: cx > + - const: mxc > + - const: nsp0 Shouldn't this be just nsp, so both cdsp0 and cdsp1 entries can be unified? That's the power domain from the device point of view, so the device expects to be in some NSP domain, not explicitly NSPn. Best regards, Krzysztof
On Mon, May 27, 2024 at 10:56 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 27/05/2024 10:43, Bartosz Golaszewski wrote: > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > > > Document the components used to boot the ADSP, CDSP0, CDSP1, GPDSP0 and > > GPDSP1 on the SA8775p SoC. > > > > Co-developed-by: Tengfei Fan <quic_tengfan@quicinc.com> > > Missing SoB. > Does it though? The patch never passed through Tengfei's hands, I just wanted to give him credit for the work modifying the sm8550-pas bindings. Bart
On 28/05/2024 09:26, Bartosz Golaszewski wrote: > On Mon, May 27, 2024 at 10:56 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 27/05/2024 10:43, Bartosz Golaszewski wrote: >>> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> >>> >>> Document the components used to boot the ADSP, CDSP0, CDSP1, GPDSP0 and >>> GPDSP1 on the SA8775p SoC. >>> >>> Co-developed-by: Tengfei Fan <quic_tengfan@quicinc.com> >> >> Missing SoB. >> > > Does it though? The patch never passed through Tengfei's hands, I just > wanted to give him credit for the work modifying the sm8550-pas > bindings. Then what was co-developed by Tengfei? If nothing, then indeed no SoB but also no Co-developed-by. Docs are clear here: every Co-developed-by *must* be followed by SoB. Best regards, Krzysztof
On 5/27/2024 4:56 PM, Krzysztof Kozlowski wrote: > On 27/05/2024 10:43, Bartosz Golaszewski wrote: >> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> >> >> Document the components used to boot the ADSP, CDSP0, CDSP1, GPDSP0 and >> GPDSP1 on the SA8775p SoC. >> >> Co-developed-by: Tengfei Fan <quic_tengfan@quicinc.com> > > Missing SoB. > >> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > ... > > >> + >> +allOf: >> + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# >> + >> + - if: >> + properties: >> + compatible: >> + enum: >> + - qcom,sa8775p-adsp-pas >> + then: >> + properties: >> + power-domains: >> + items: >> + - description: LCX power domain >> + - description: LMX power domain >> + power-domain-names: >> + items: >> + - const: lcx >> + - const: lmx >> + >> + - if: >> + properties: >> + compatible: >> + enum: >> + - qcom,sa8775p-cdsp-pas > > cdsp0 > >> + then: >> + properties: >> + power-domains: >> + items: >> + - description: CX power domain >> + - description: MXC power domain >> + - description: NSP0 power domain >> + power-domain-names: >> + items: >> + - const: cx >> + - const: mxc >> + - const: nsp0 > > Shouldn't this be just nsp, so both cdsp0 and cdsp1 entries can be > unified? That's the power domain from the device point of view, so the > device expects to be in some NSP domain, not explicitly NSPn. > Both cdsp0 and cdsp1 entries can uniformly use nsp. > > > Best regards, > Krzysztof > -- Thx and BRs, Tengfei Fan
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