In preparation to add tracepoint support, move protocol error UUID
definition to a common location and make CXL RAS capability struct
global for use across different modules.
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
---
drivers/firmware/efi/cper_cxl.c | 11 -----------
drivers/firmware/efi/cper_cxl.h | 7 ++-----
include/linux/cper.h | 4 ++++
include/linux/cxl-event.h | 11 +++++++++++
4 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c
index a55771b99a97..4fd8d783993e 100644
--- a/drivers/firmware/efi/cper_cxl.c
+++ b/drivers/firmware/efi/cper_cxl.c
@@ -18,17 +18,6 @@
#define PROT_ERR_VALID_DVSEC BIT_ULL(5)
#define PROT_ERR_VALID_ERROR_LOG BIT_ULL(6)
-/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */
-struct cxl_ras_capability_regs {
- u32 uncor_status;
- u32 uncor_mask;
- u32 uncor_severity;
- u32 cor_status;
- u32 cor_mask;
- u32 cap_control;
- u32 header_log[16];
-};
-
static const char * const prot_err_agent_type_strs[] = {
"Restricted CXL Device",
"Restricted CXL Host Downstream Port",
diff --git a/drivers/firmware/efi/cper_cxl.h b/drivers/firmware/efi/cper_cxl.h
index 86bfcf7909ec..6f8c00495708 100644
--- a/drivers/firmware/efi/cper_cxl.h
+++ b/drivers/firmware/efi/cper_cxl.h
@@ -7,14 +7,11 @@
* Author: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
*/
+#include <linux/cxl-event.h>
+
#ifndef LINUX_CPER_CXL_H
#define LINUX_CPER_CXL_H
-/* CXL Protocol Error Section */
-#define CPER_SEC_CXL_PROT_ERR \
- GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78, \
- 0x4B, 0x77, 0x10, 0x48)
-
#pragma pack(1)
/* Compute Express Link Protocol Error Section, UEFI v2.10 sec N.2.13 */
diff --git a/include/linux/cper.h b/include/linux/cper.h
index 265b0f8fc0b3..5c6d4d5b9975 100644
--- a/include/linux/cper.h
+++ b/include/linux/cper.h
@@ -89,6 +89,10 @@ enum {
#define CPER_NOTIFY_DMAR \
GUID_INIT(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \
0x72, 0x2D, 0xEB, 0x41)
+/* CXL Protocol Error Section */
+#define CPER_SEC_CXL_PROT_ERR \
+ GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78, \
+ 0x4B, 0x77, 0x10, 0x48)
/* CXL Event record UUIDs are formatted as GUIDs and reported in section type */
/*
diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h
index 60b25020281f..f11e52ff565a 100644
--- a/include/linux/cxl-event.h
+++ b/include/linux/cxl-event.h
@@ -154,6 +154,17 @@ struct cxl_cper_event_rec {
union cxl_event event;
} __packed;
+/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */
+struct cxl_ras_capability_regs {
+ u32 uncor_status;
+ u32 uncor_mask;
+ u32 uncor_severity;
+ u32 cor_status;
+ u32 cor_mask;
+ u32 cap_control;
+ u32 header_log[16];
+};
+
struct cxl_cper_work_data {
enum cxl_event_type event_type;
struct cxl_cper_event_rec rec;
--
2.17.1On Wed, 22 May 2024 15:08:36 +0000 Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> wrote: > In preparation to add tracepoint support, move protocol error UUID > definition to a common location and make CXL RAS capability struct > global for use across different modules. > > Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> FWIW given already well reviewed. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
On 6/7/2024 8:14 AM, Jonathan Cameron wrote: > On Wed, 22 May 2024 15:08:36 +0000 > Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> wrote: > >> In preparation to add tracepoint support, move protocol error UUID >> definition to a common location and make CXL RAS capability struct >> global for use across different modules. >> >> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> > FWIW given already well reviewed. > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Sorry I missed your reviewed by tag. Thanks for reviewing my patches! Thanks Smita
On Wed, May 22, 2024 at 03:08:36PM +0000, Smita Koralahalli wrote: > In preparation to add tracepoint support, move protocol error UUID > definition to a common location and make CXL RAS capability struct > global for use across different modules. Reviewed-by: Alison Schofield <alison.schofield@intel.com> > > Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> > --- > drivers/firmware/efi/cper_cxl.c | 11 ----------- > drivers/firmware/efi/cper_cxl.h | 7 ++----- > include/linux/cper.h | 4 ++++ > include/linux/cxl-event.h | 11 +++++++++++ > 4 files changed, 17 insertions(+), 16 deletions(-) > snip to end
On 5/22/24 8:08 AM, Smita Koralahalli wrote:
> In preparation to add tracepoint support, move protocol error UUID
> definition to a common location and make CXL RAS capability struct
> global for use across different modules.
>
> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> drivers/firmware/efi/cper_cxl.c | 11 -----------
> drivers/firmware/efi/cper_cxl.h | 7 ++-----
> include/linux/cper.h | 4 ++++
> include/linux/cxl-event.h | 11 +++++++++++
> 4 files changed, 17 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c
> index a55771b99a97..4fd8d783993e 100644
> --- a/drivers/firmware/efi/cper_cxl.c
> +++ b/drivers/firmware/efi/cper_cxl.c
> @@ -18,17 +18,6 @@
> #define PROT_ERR_VALID_DVSEC BIT_ULL(5)
> #define PROT_ERR_VALID_ERROR_LOG BIT_ULL(6)
>
> -/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */
> -struct cxl_ras_capability_regs {
> - u32 uncor_status;
> - u32 uncor_mask;
> - u32 uncor_severity;
> - u32 cor_status;
> - u32 cor_mask;
> - u32 cap_control;
> - u32 header_log[16];
> -};
> -
> static const char * const prot_err_agent_type_strs[] = {
> "Restricted CXL Device",
> "Restricted CXL Host Downstream Port",
> diff --git a/drivers/firmware/efi/cper_cxl.h b/drivers/firmware/efi/cper_cxl.h
> index 86bfcf7909ec..6f8c00495708 100644
> --- a/drivers/firmware/efi/cper_cxl.h
> +++ b/drivers/firmware/efi/cper_cxl.h
> @@ -7,14 +7,11 @@
> * Author: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
> */
>
> +#include <linux/cxl-event.h>
> +
> #ifndef LINUX_CPER_CXL_H
> #define LINUX_CPER_CXL_H
>
> -/* CXL Protocol Error Section */
> -#define CPER_SEC_CXL_PROT_ERR \
> - GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78, \
> - 0x4B, 0x77, 0x10, 0x48)
> -
> #pragma pack(1)
>
> /* Compute Express Link Protocol Error Section, UEFI v2.10 sec N.2.13 */
> diff --git a/include/linux/cper.h b/include/linux/cper.h
> index 265b0f8fc0b3..5c6d4d5b9975 100644
> --- a/include/linux/cper.h
> +++ b/include/linux/cper.h
> @@ -89,6 +89,10 @@ enum {
> #define CPER_NOTIFY_DMAR \
> GUID_INIT(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \
> 0x72, 0x2D, 0xEB, 0x41)
> +/* CXL Protocol Error Section */
> +#define CPER_SEC_CXL_PROT_ERR \
> + GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78, \
> + 0x4B, 0x77, 0x10, 0x48)
>
> /* CXL Event record UUIDs are formatted as GUIDs and reported in section type */
> /*
> diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h
> index 60b25020281f..f11e52ff565a 100644
> --- a/include/linux/cxl-event.h
> +++ b/include/linux/cxl-event.h
> @@ -154,6 +154,17 @@ struct cxl_cper_event_rec {
> union cxl_event event;
> } __packed;
>
> +/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */
> +struct cxl_ras_capability_regs {
> + u32 uncor_status;
> + u32 uncor_mask;
> + u32 uncor_severity;
> + u32 cor_status;
> + u32 cor_mask;
> + u32 cap_control;
> + u32 header_log[16];
> +};
> +
> struct cxl_cper_work_data {
> enum cxl_event_type event_type;
> struct cxl_cper_event_rec rec;
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