The MCQ_OPR_OFFSET_n macro has taken 'hba' on the caller context
without receiving 'hba' instance as an argument.  To prevent potential
bugs in future use cases, this patch added an argument 'hba'.

Fixes: 2468da61ea09 ("scsi: ufs: core: mcq: Configure operation and runtime interface")
Cc: Asutosh Das <quic_asutoshd@quicinc.com>
Signed-off-by: Minwoo Im <minwoo.im@samsung.com>
---
 drivers/ufs/core/ufs-mcq.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
index 768bf87cd80d..1cfdda9acb0a 100644
--- a/drivers/ufs/core/ufs-mcq.c
+++ b/drivers/ufs/core/ufs-mcq.c
@@ -231,7 +231,7 @@ int ufshcd_mcq_memory_alloc(struct ufs_hba *hba)
 
 /* Operation and runtime registers configuration */
 #define MCQ_CFG_n(r, i)	((r) + MCQ_QCFG_SIZE * (i))
-#define MCQ_OPR_OFFSET_n(p, i) \
+#define MCQ_OPR_OFFSET_n(hba, p, i) \
 	(hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i))
 
 static void __iomem *mcq_opr_base(struct ufs_hba *hba,
@@ -343,10 +343,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
 		ufsmcq_writelx(hba, upper_32_bits(hwq->sqe_dma_addr),
 			      MCQ_CFG_n(REG_SQUBA, i));
 		/* Submission Queue Doorbell Address Offset */
-		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQD, i),
+		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(hba, OPR_SQD, i),
 			      MCQ_CFG_n(REG_SQDAO, i));
 		/* Submission Queue Interrupt Status Address Offset */
-		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQIS, i),
+		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(hba, OPR_SQIS, i),
 			      MCQ_CFG_n(REG_SQISAO, i));
 
 		/* Completion Queue Lower Base Address */
@@ -356,10 +356,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
 		ufsmcq_writelx(hba, upper_32_bits(hwq->cqe_dma_addr),
 			      MCQ_CFG_n(REG_CQUBA, i));
 		/* Completion Queue Doorbell Address Offset */
-		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQD, i),
+		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(hba, OPR_CQD, i),
 			      MCQ_CFG_n(REG_CQDAO, i));
 		/* Completion Queue Interrupt Status Address Offset */
-		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQIS, i),
+		ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(hba, OPR_CQIS, i),
 			      MCQ_CFG_n(REG_CQISAO, i));
 
 		/* Save the base addresses for quicker access */
-- 
2.34.1

On 5/15/24 21:14, Minwoo Im wrote:
>   /* Operation and runtime registers configuration */
>   #define MCQ_CFG_n(r, i)	((r) + MCQ_QCFG_SIZE * (i))
> -#define MCQ_OPR_OFFSET_n(p, i) \
> +#define MCQ_OPR_OFFSET_n(hba, p, i) \
>   	(hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i))
Since inline functions are preferred over macros, please convert the
MCQ_OPR_OFFSET_n() macro into an inline function.

Thanks,

Bart.

On 24-05-16 08:03:17, Bart Van Assche wrote:
> On 5/15/24 21:14, Minwoo Im wrote:
> >   /* Operation and runtime registers configuration */
> >   #define MCQ_CFG_n(r, i)	((r) + MCQ_QCFG_SIZE * (i))
> > -#define MCQ_OPR_OFFSET_n(p, i) \
> > +#define MCQ_OPR_OFFSET_n(hba, p, i) \
> >   	(hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i))
> Since inline functions are preferred over macros, please convert the
> MCQ_OPR_OFFSET_n() macro into an inline function.

Okay.  I will prepare v2.

> 
> Thanks,
> 
> Bart.
>