On SA8775P, Ethernet DMA controller is coherent with the CPU.
allow specifying that.

Signed-off-by: Sagar Cheluvegowda <quic_scheluve@quicinc.com>
---
 Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
index 69a337c7e345..44028987ef92 100644
--- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
+++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
@@ -66,6 +66,8 @@ properties:
   phy-names:
     const: serdes
 
+  dma-coherent: true
+
 required:
   - compatible
   - clocks

-- 
2.34.1

On 08/05/2024 03:31, Sagar Cheluvegowda wrote:
> On SA8775P, Ethernet DMA controller is coherent with the CPU.
> allow specifying that.
> 
> Signed-off-by: Sagar Cheluvegowda <quic_scheluve@quicinc.com>
> ---
>  Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
> index 69a337c7e345..44028987ef92 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
> @@ -66,6 +66,8 @@ properties:
>    phy-names:
>      const: serdes
>  
> +  dma-coherent: true

Do not add properties to the end of the list. That's downstream
practice... Keep it next to iommus, for example.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof