Add YAML bindings for cv1800 spi nor controller.

Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
---
 .../bindings/spi/sophgo,spi-cv1800-nor.yaml   | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml

diff --git a/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
new file mode 100644
index 000000000000..121a80fbf2d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/sophgo,spi-cv1800-nor.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SPI controller for Sophgo RISC-V SoCs
+
+maintainers:
+  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
+
+allOf:
+  - $ref: /schemas/spi/spi-controller.yaml#
+
+properties:
+  compatible:
+    const: sophgo,cv1800b-nor
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    spi@10000000 {
+      compatible = "sophgo,cv1800b-nor";
+      reg = <0x10000000 0x10000000>;
+    };
-- 
2.25.1

Hi,

On Sat Apr 27, 2024 at 9:54 AM CEST, Jingbao Qiu wrote:
> Add YAML bindings for cv1800 spi nor controller.

nit: SPI NOR

Is this really just an SPI NOR controller? Doesn't it work with
SPI NAND? Or in general, any memory like SPI device.

-michael

On Tue, Apr 30, 2024 at 7:13 PM Michael Walle <mwalle@kernel.org> wrote:
>
> Hi,
>
> On Sat Apr 27, 2024 at 9:54 AM CEST, Jingbao Qiu wrote:
> > Add YAML bindings for cv1800 spi nor controller.
>
> nit: SPI NOR

I will fix it.

>
> Is this really just an SPI NOR controller? Doesn't it work with
> SPI NAND? Or in general, any memory like SPI device.
>

Yes, This hardware is only suitable for NOR flash and does not support NAND.
This is a detailed document.

Link: https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM/contents/en

Best Regards
Jingbao Qiu

On 27/04/2024 09:54, Jingbao Qiu wrote:
> Add YAML bindings for cv1800 spi nor controller.
> 
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> ---
>  .../bindings/spi/sophgo,spi-cv1800-nor.yaml   | 33 +++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> new file mode 100644
> index 000000000000..121a80fbf2d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml

Filename like compatible.


> @@ -0,0 +1,33 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/sophgo,spi-cv1800-nor.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI controller for Sophgo RISC-V SoCs
> +
> +maintainers:
> +  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> +
> +allOf:
> +  - $ref: /schemas/spi/spi-controller.yaml#
> +
> +properties:
> +  compatible:
> +    const: sophgo,cv1800b-nor

A bit unusual that compatible has nothing in common with tile of the
binding, thus the name of the hardware block.

> +
> +  reg:
> +    maxItems: 1

No clocks? No interrupts? This looks incomplete.

> +
> +required:
> +  - compatible
> +  - reg


Best regards,
Krzysztof

On Mon, Apr 29, 2024 at 2:18 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 27/04/2024 09:54, Jingbao Qiu wrote:
> > Add YAML bindings for cv1800 spi nor controller.
> >
> > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > ---
> >  .../bindings/spi/sophgo,spi-cv1800-nor.yaml   | 33 +++++++++++++++++++
> >  1 file changed, 33 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> > new file mode 100644
> > index 000000000000..121a80fbf2d5
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
>
> Filename like compatible.
>

I will fix it.

>
> > @@ -0,0 +1,33 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/spi/sophgo,spi-cv1800-nor.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: SPI controller for Sophgo RISC-V SoCs
> > +
> > +maintainers:
> > +  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > +
> > +allOf:
> > +  - $ref: /schemas/spi/spi-controller.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    const: sophgo,cv1800b-nor
>
> A bit unusual that compatible has nothing in common with tile of the
> binding, thus the name of the hardware block.

I will modify the title.

>
> > +
> > +  reg:
> > +    maxItems: 1
>
> No clocks? No interrupts? This looks incomplete.

If necessary, I will add clocks and interrupts.

Thank you for your suggestion.

Best regards,
Jingbao Qiu

On 29/04/2024 08:41, Jingbao Qiu wrote:
> 
>>
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>
>> No clocks? No interrupts? This looks incomplete.
> 
> If necessary, I will add clocks and interrupts.

Does your hardware has them? Binding should be complete, so fully
describe your hardware.

Best regards,
Krzysztof

On Mon, Apr 29, 2024 at 2:43 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 29/04/2024 08:41, Jingbao Qiu wrote:
> >
> >>
> >>> +
> >>> +  reg:
> >>> +    maxItems: 1
> >>
> >> No clocks? No interrupts? This looks incomplete.
> >
> > If necessary, I will add clocks and interrupts.
>
> Does your hardware has them? Binding should be complete, so fully
> describe your hardware.
>

I will provide a complete description of the hardware.

Best regards,
Jingbao QIu