[PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification

Heiko Stuebner posted 2 patches 6 months, 3 weeks ago
[PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification
Posted by Heiko Stuebner 6 months, 3 weeks ago
From: Heiko Stuebner <heiko.stuebner@cherry.de>

The clock is in Hz while the value checked against is in kHz, so
actual frequencies will never be able to be below to max value.
Fix this by specifying the max-value in Hz too.

Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 9bee1fd88e6a2..523880a4e8e74 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
 		else
 			dclk_out_rate = v_pixclk >> 2;
 
-		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
+		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
 		if (!dclk_rate) {
 			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",
 				dclk_out_rate);
@@ -1736,7 +1736,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
 		 * dclk_rate = N * dclk_core_rate N = (1,2,4 ),
 		 * we get a little factor here
 		 */
-		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
+		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
 		if (!dclk_rate) {
 			drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld KHZ\n",
 				dclk_out_rate);
-- 
2.39.2
Re:[PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification
Posted by Andy Yan 3 days, 2 hours ago
+ Sebastina,
Hi Sebastian,  I think you also need this patch when you test DSI on rk3588 with  DSI2 support patch from Heiko.

At 2024-04-26 03:55:05, "Heiko Stuebner" <heiko@sntech.de> wrote:
>From: Heiko Stuebner <heiko.stuebner@cherry.de>
>
>The clock is in Hz while the value checked against is in kHz, so
>actual frequencies will never be able to be below to max value.
>Fix this by specifying the max-value in Hz too.
>
>Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
>Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
>---
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>index 9bee1fd88e6a2..523880a4e8e74 100644
>--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>@@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
> 		else
> 			dclk_out_rate = v_pixclk >> 2;
> 
>-		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
>+		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
> 		if (!dclk_rate) {
> 			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",
> 				dclk_out_rate);
>@@ -1736,7 +1736,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
> 		 * dclk_rate = N * dclk_core_rate N = (1,2,4 ),
> 		 * we get a little factor here
> 		 */
>-		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
>+		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
> 		if (!dclk_rate) {
> 			drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld KHZ\n",
> 				dclk_out_rate);
>-- 
>2.39.2
Re: [PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification
Posted by Quentin Schulz 6 months, 2 weeks ago
Hi Heiko,

On 4/25/24 9:55 PM, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@cherry.de>
> 
> The clock is in Hz while the value checked against is in kHz, so
> actual frequencies will never be able to be below to max value.
> Fix this by specifying the max-value in Hz too.
> 
> Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
> ---
>   drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 9bee1fd88e6a2..523880a4e8e74 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>   		else
>   			dclk_out_rate = v_pixclk >> 2;
>   
> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>   		if (!dclk_rate) {
>   			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",

It seems the error message is incorrect as well and should be saying Hz 
instead of KHz. (note also the lowercase z).

>   				dclk_out_rate);
> @@ -1736,7 +1736,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>   		 * dclk_rate = N * dclk_core_rate N = (1,2,4 ),
>   		 * we get a little factor here
>   		 */
> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>   		if (!dclk_rate) {
>   			drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld KHZ\n",

Ditto.

Otherwise,

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>

Thanks!
Quentin
Re:Re: [PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification
Posted by Andy Yan 2 days, 3 hours ago
Hi,

At 2024-05-06 15:44:36, "Quentin Schulz" <quentin.schulz@cherry.de> wrote:
>Hi Heiko,
>
>On 4/25/24 9:55 PM, Heiko Stuebner wrote:
>> From: Heiko Stuebner <heiko.stuebner@cherry.de>
>> 
>> The clock is in Hz while the value checked against is in kHz, so
>> actual frequencies will never be able to be below to max value.
>> Fix this by specifying the max-value in Hz too.
>> 
>> Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
>> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
>> ---
>>   drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>> index 9bee1fd88e6a2..523880a4e8e74 100644
>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>> @@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>>   		else
>>   			dclk_out_rate = v_pixclk >> 2;
>>   
>> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
>> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>>   		if (!dclk_rate) {
>>   			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",
>
>It seems the error message is incorrect as well and should be saying Hz 
>instead of KHz. (note also the lowercase z).

I think kHz is fine, we can find many siminary usage in drm:

drivers/gpu/drm/drm_vblank.c
656:    drm_dbg_core(dev, "crtc %u: clock %d kHz framedur %d linedur %d\n",
>
>>   				dclk_out_rate);
>> @@ -1736,7 +1736,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>>   		 * dclk_rate = N * dclk_core_rate N = (1,2,4 ),
>>   		 * we get a little factor here
>>   		 */
>> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
>> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>>   		if (!dclk_rate) {
>>   			drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld KHZ\n",
>
>Ditto.
>
>Otherwise,
>
>Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>

Acked-by: Andy Yan<andyshrk@163.com>

>
>Thanks!
>Quentin
Re: [PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification
Posted by Quentin Schulz 1 day, 18 hours ago
Hi Andy,

On 11/14/24 1:50 AM, Andy Yan wrote:
> 
> Hi,
> 
> At 2024-05-06 15:44:36, "Quentin Schulz" <quentin.schulz@cherry.de> wrote:
>> Hi Heiko,
>>
>> On 4/25/24 9:55 PM, Heiko Stuebner wrote:
>>> From: Heiko Stuebner <heiko.stuebner@cherry.de>
>>>
>>> The clock is in Hz while the value checked against is in kHz, so
>>> actual frequencies will never be able to be below to max value.
>>> Fix this by specifying the max-value in Hz too.
>>>
>>> Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
>>> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
>>> ---
>>>    drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
>>>    1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>> index 9bee1fd88e6a2..523880a4e8e74 100644
>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>> @@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>>>    		else
>>>    			dclk_out_rate = v_pixclk >> 2;
>>>    
>>> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
>>> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>>>    		if (!dclk_rate) {
>>>    			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",
>>
>> It seems the error message is incorrect as well and should be saying Hz
>> instead of KHz. (note also the lowercase z).
> 
> I think kHz is fine, we can find many siminary usage in drm:
> 
> drivers/gpu/drm/drm_vblank.c
> 656:    drm_dbg_core(dev, "crtc %u: clock %d kHz framedur %d linedur %d\n",

The issue is that we print kHz for something that is in Hz, not that we 
print a value in kHz.

The former is incorrect, the latter is fine. We are in the former 
scenario here I believe, so it needs to be fixed.

Cheers,
Quentin
Re:Re: [PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification
Posted by Andy Yan 1 day, 17 hours ago
Hi Quetin,
At 2024-11-14 17:38:56, "Quentin Schulz" <quentin.schulz@cherry.de> wrote:
>Hi Andy,
>
>On 11/14/24 1:50 AM, Andy Yan wrote:
>> 
>> Hi,
>> 
>> At 2024-05-06 15:44:36, "Quentin Schulz" <quentin.schulz@cherry.de> wrote:
>>> Hi Heiko,
>>>
>>> On 4/25/24 9:55 PM, Heiko Stuebner wrote:
>>>> From: Heiko Stuebner <heiko.stuebner@cherry.de>
>>>>
>>>> The clock is in Hz while the value checked against is in kHz, so
>>>> actual frequencies will never be able to be below to max value.
>>>> Fix this by specifying the max-value in Hz too.
>>>>
>>>> Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
>>>> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
>>>> ---
>>>>    drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
>>>>    1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>>> index 9bee1fd88e6a2..523880a4e8e74 100644
>>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>>> @@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>>>>    		else
>>>>    			dclk_out_rate = v_pixclk >> 2;
>>>>    
>>>> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
>>>> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>>>>    		if (!dclk_rate) {
>>>>    			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",
>>>
>>> It seems the error message is incorrect as well and should be saying Hz
>>> instead of KHz. (note also the lowercase z).
>> 
>> I think kHz is fine, we can find many siminary usage in drm:
>> 
>> drivers/gpu/drm/drm_vblank.c
>> 656:    drm_dbg_core(dev, "crtc %u: clock %d kHz framedur %d linedur %d\n",
>
>The issue is that we print kHz for something that is in Hz, not that we 
>print a value in kHz.
>
>The former is incorrect, the latter is fine. We are in the former 
>scenario here I believe, so it needs to be fixed.

Yes, you are right.

>
>Cheers,
>Quentin
>
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