The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB
controller and can reuse the existing Exynos glue. Add the
google,gs101-dwusb3 compatible and associated driver data. Four clocks
are required for USB for this SoC:
    * bus clock
    * suspend clock
    * Link interface AXI clock
    * Link interface APB clock

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 drivers/usb/dwc3/dwc3-exynos.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index 3427522a7c6a..9a6e988d165a 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -169,6 +169,12 @@ static const struct dwc3_exynos_driverdata exynos850_drvdata = {
 	.suspend_clk_idx = -1,
 };
 
+static const struct dwc3_exynos_driverdata gs101_drvdata = {
+	.clk_names = { "bus_early", "susp_clk", "link_aclk", "link_pclk" },
+	.num_clks = 4,
+	.suspend_clk_idx = 1,
+};
+
 static const struct of_device_id exynos_dwc3_match[] = {
 	{
 		.compatible = "samsung,exynos5250-dwusb3",
@@ -182,6 +188,9 @@ static const struct of_device_id exynos_dwc3_match[] = {
 	}, {
 		.compatible = "samsung,exynos850-dwusb3",
 		.data = &exynos850_drvdata,
+	}, {
+		.compatible = "google,gs101-dwusb3",
+		.data = &gs101_drvdata,
 	}, {
 	}
 };

-- 
2.44.0.769.g3c40516874-goog

On Tue, 23 Apr 2024 at 21:19, André Draszik <andre.draszik@linaro.org> wrote:
>
> The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB
> controller and can reuse the existing Exynos glue. Add the
> google,gs101-dwusb3 compatible and associated driver data. Four clocks
> are required for USB for this SoC:
>     * bus clock
>     * suspend clock
>     * Link interface AXI clock
>     * Link interface APB clock
>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---

Reviewed-by:  Peter Griffin <peter.griffin@linaro.org>

regards,

Peter

On 23/04/2024 22:19, André Draszik wrote:
> The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB
> controller and can reuse the existing Exynos glue. Add the
> google,gs101-dwusb3 compatible and associated driver data. Four clocks
> are required for USB for this SoC:
>     * bus clock
>     * suspend clock
>     * Link interface AXI clock
>     * Link interface APB clock
> 
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---
>  drivers/usb/dwc3/dwc3-exynos.c | 9 +++++++++

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

On Tue, Apr 23, 2024, André Draszik wrote:
> The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB
> controller and can reuse the existing Exynos glue. Add the
> google,gs101-dwusb3 compatible and associated driver data. Four clocks
> are required for USB for this SoC:
>     * bus clock
>     * suspend clock
>     * Link interface AXI clock
>     * Link interface APB clock
> 
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---
>  drivers/usb/dwc3/dwc3-exynos.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
> index 3427522a7c6a..9a6e988d165a 100644
> --- a/drivers/usb/dwc3/dwc3-exynos.c
> +++ b/drivers/usb/dwc3/dwc3-exynos.c
> @@ -169,6 +169,12 @@ static const struct dwc3_exynos_driverdata exynos850_drvdata = {
>  	.suspend_clk_idx = -1,
>  };
>  
> +static const struct dwc3_exynos_driverdata gs101_drvdata = {
> +	.clk_names = { "bus_early", "susp_clk", "link_aclk", "link_pclk" },
> +	.num_clks = 4,
> +	.suspend_clk_idx = 1,
> +};
> +
>  static const struct of_device_id exynos_dwc3_match[] = {
>  	{
>  		.compatible = "samsung,exynos5250-dwusb3",
> @@ -182,6 +188,9 @@ static const struct of_device_id exynos_dwc3_match[] = {
>  	}, {
>  		.compatible = "samsung,exynos850-dwusb3",
>  		.data = &exynos850_drvdata,
> +	}, {
> +		.compatible = "google,gs101-dwusb3",
> +		.data = &gs101_drvdata,
>  	}, {
>  	}
>  };
> 
> -- 
> 2.44.0.769.g3c40516874-goog
> 

Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>

Thanks,
Thinh