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[PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state

Tiezhu Yang posted 4 patches 1 year, 10 months ago
There is a newer version of this series
[PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state
Posted by Tiezhu Yang 1 year, 10 months ago 
Currently, per_cpu_offset(x) is defined as __per_cpu_offset[x])
only under CONFIG_SMP in include/asm-generic/percpu.h, that is
to say, the implementation of loongarch_common_resume() which
calls per_cpu_offset(0) is not suitable for the case of non-SMP,
so do not write per_cpu_offset(0) to PERCPU_BASE_KS when resume,
just save the value of PERCPU_BASE_KS when suspend and restore
it when resume to make it work well for both SMP and non-SMP.

Tested with the command "rtcwake -d rtc1 -s 20 -m mem -v", dmesg
shows that "PM: suspend entry (deep)" and "PM: suspend exit".

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
 arch/loongarch/power/suspend.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
index 166d9e06a64b..7a97949ddade 100644
--- a/arch/loongarch/power/suspend.c
+++ b/arch/loongarch/power/suspend.c
@@ -16,6 +16,7 @@
 #include <asm/tlbflush.h>
 
 u64 loongarch_suspend_addr;
+static u64 saved_pcpu_base;
 
 struct saved_registers {
 	u32 ecfg;
@@ -36,6 +37,7 @@ void loongarch_common_suspend(void)
 	saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
 	saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
 	saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
+	saved_pcpu_base = csr_read64(PERCPU_BASE_KS);
 
 	loongarch_suspend_addr = loongson_sysconf.suspend_addr;
 }
@@ -44,7 +46,7 @@ void loongarch_common_resume(void)
 {
 	sync_counter();
 	local_flush_tlb_all();
-	csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
+	csr_write64(saved_pcpu_base, PERCPU_BASE_KS);
 	csr_write64(eentry, LOONGARCH_CSR_EENTRY);
 	csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
 	csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
-- 
2.42.0
Re: [PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state
Posted by Huacai Chen 1 year, 10 months ago 
Hi, Tiezhu,

On Thu, Apr 11, 2024 at 9:05 AM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
>
> Currently, per_cpu_offset(x) is defined as __per_cpu_offset[x])
> only under CONFIG_SMP in include/asm-generic/percpu.h, that is
> to say, the implementation of loongarch_common_resume() which
> calls per_cpu_offset(0) is not suitable for the case of non-SMP,
> so do not write per_cpu_offset(0) to PERCPU_BASE_KS when resume,
> just save the value of PERCPU_BASE_KS when suspend and restore
> it when resume to make it work well for both SMP and non-SMP.
For non-SMP you need PERCPU_BASE_KS to do what?

Huacai

>
> Tested with the command "rtcwake -d rtc1 -s 20 -m mem -v", dmesg
> shows that "PM: suspend entry (deep)" and "PM: suspend exit".
>
> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
> ---
>  arch/loongarch/power/suspend.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> index 166d9e06a64b..7a97949ddade 100644
> --- a/arch/loongarch/power/suspend.c
> +++ b/arch/loongarch/power/suspend.c
> @@ -16,6 +16,7 @@
>  #include <asm/tlbflush.h>
>
>  u64 loongarch_suspend_addr;
> +static u64 saved_pcpu_base;
>
>  struct saved_registers {
>         u32 ecfg;
> @@ -36,6 +37,7 @@ void loongarch_common_suspend(void)
>         saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
>         saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
>         saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
> +       saved_pcpu_base = csr_read64(PERCPU_BASE_KS);
>
>         loongarch_suspend_addr = loongson_sysconf.suspend_addr;
>  }
> @@ -44,7 +46,7 @@ void loongarch_common_resume(void)
>  {
>         sync_counter();
>         local_flush_tlb_all();
> -       csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> +       csr_write64(saved_pcpu_base, PERCPU_BASE_KS);
>         csr_write64(eentry, LOONGARCH_CSR_EENTRY);
>         csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
>         csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
> --
> 2.42.0
>
>
Re: [PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state
Posted by Tiezhu Yang 1 year, 10 months ago 

On 04/12/2024 12:18 PM, Huacai Chen wrote:
> Hi, Tiezhu,
>
> On Thu, Apr 11, 2024 at 9:05 AM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
>>
>> Currently, per_cpu_offset(x) is defined as __per_cpu_offset[x])
>> only under CONFIG_SMP in include/asm-generic/percpu.h, that is
>> to say, the implementation of loongarch_common_resume() which
>> calls per_cpu_offset(0) is not suitable for the case of non-SMP,
>> so do not write per_cpu_offset(0) to PERCPU_BASE_KS when resume,
>> just save the value of PERCPU_BASE_KS when suspend and restore
>> it when resume to make it work well for both SMP and non-SMP.
> For non-SMP you need PERCPU_BASE_KS to do what?

The initial aim is to avoid build error under !CONFIG_SMP
and it works well on both !CONFIG_SMP and CONFIG_SMP, the
changes are similar with the code in hibernate.c.

An alternative way is to do the following simple change,
but it seems a little ugly due to the ifdef, let me know
what is your preference.

diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
index 166d9e06a64b..35191afefcda 100644
--- a/arch/loongarch/power/suspend.c
+++ b/arch/loongarch/power/suspend.c
@@ -44,7 +44,9 @@ void loongarch_common_resume(void)
  {
         sync_counter();
         local_flush_tlb_all();
+#ifdef
         csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
+#endif
         csr_write64(eentry, LOONGARCH_CSR_EENTRY);
         csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
         csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);

Thanks,
Tiezhu
Re: [PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state
Posted by Huacai Chen 1 year, 10 months ago 
On Fri, Apr 12, 2024 at 5:30 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
>
>
>
> On 04/12/2024 12:18 PM, Huacai Chen wrote:
> > Hi, Tiezhu,
> >
> > On Thu, Apr 11, 2024 at 9:05 AM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
> >>
> >> Currently, per_cpu_offset(x) is defined as __per_cpu_offset[x])
> >> only under CONFIG_SMP in include/asm-generic/percpu.h, that is
> >> to say, the implementation of loongarch_common_resume() which
> >> calls per_cpu_offset(0) is not suitable for the case of non-SMP,
> >> so do not write per_cpu_offset(0) to PERCPU_BASE_KS when resume,
> >> just save the value of PERCPU_BASE_KS when suspend and restore
> >> it when resume to make it work well for both SMP and non-SMP.
> > For non-SMP you need PERCPU_BASE_KS to do what?
>
> The initial aim is to avoid build error under !CONFIG_SMP
> and it works well on both !CONFIG_SMP and CONFIG_SMP, the
> changes are similar with the code in hibernate.c.
>
> An alternative way is to do the following simple change,
> but it seems a little ugly due to the ifdef, let me know
> what is your preference.
Add "u64 pcpu_base" at the last of saved_registers is better than this
patch, and can avoid ifdef.

Huacai

>
> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> index 166d9e06a64b..35191afefcda 100644
> --- a/arch/loongarch/power/suspend.c
> +++ b/arch/loongarch/power/suspend.c
> @@ -44,7 +44,9 @@ void loongarch_common_resume(void)
>   {
>          sync_counter();
>          local_flush_tlb_all();
> +#ifdef
>          csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> +#endif
>          csr_write64(eentry, LOONGARCH_CSR_EENTRY);
>          csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
>          csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
>
> Thanks,
> Tiezhu
>
>

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