[PATCH v5 0/4] perf/x86/amd: add LBR capture support outside of hardware events

Andrii Nakryiko posted 4 patches 1 year, 10 months ago
arch/x86/events/amd/core.c   | 37 +++++++++++++++++++++++++++++++++++-
arch/x86/events/amd/lbr.c    | 13 +------------
arch/x86/events/perf_event.h | 13 +++++++++++++
3 files changed, 50 insertions(+), 13 deletions(-)
[PATCH v5 0/4] perf/x86/amd: add LBR capture support outside of hardware events
Posted by Andrii Nakryiko 1 year, 10 months ago
Add AMD-specific implementation of perf_snapshot_branch_stack static call that
allows LBR capture from arbitrary points in the kernel. This is utilized by
BPF programs. See patch #3 for all the details.

Patches #1 and #2 are preparatory steps to ensure LBR freezing is completely
inlined and have no branches, to minimize LBR snapshot contamination.

Patch #4 removes an artificial restriction on perf events with LBR enabled.

v4->v5:
  - rebased on top of perf/urgent branch to resolve conflicts with
    598c2fafc06f ("perf/x86/amd/lbr: Use freeze based on availability").

Andrii Nakryiko (4):
  perf/x86/amd: ensure amd_pmu_core_disable_all() is always inlined
  perf/x86/amd: avoid taking branches before disabling LBR
  perf/x86/amd: support capturing LBR from software events
  perf/x86/amd: don't reject non-sampling events with configured LBR

 arch/x86/events/amd/core.c   | 37 +++++++++++++++++++++++++++++++++++-
 arch/x86/events/amd/lbr.c    | 13 +------------
 arch/x86/events/perf_event.h | 13 +++++++++++++
 3 files changed, 50 insertions(+), 13 deletions(-)

-- 
2.43.0
Re: [PATCH v5 0/4] perf/x86/amd: add LBR capture support outside of hardware events
Posted by Ingo Molnar 1 year, 10 months ago
* Andrii Nakryiko <andrii@kernel.org> wrote:

> Add AMD-specific implementation of perf_snapshot_branch_stack static call that
> allows LBR capture from arbitrary points in the kernel. This is utilized by
> BPF programs. See patch #3 for all the details.
> 
> Patches #1 and #2 are preparatory steps to ensure LBR freezing is completely
> inlined and have no branches, to minimize LBR snapshot contamination.
> 
> Patch #4 removes an artificial restriction on perf events with LBR enabled.
> 
> v4->v5:
>   - rebased on top of perf/urgent branch to resolve conflicts with
>     598c2fafc06f ("perf/x86/amd/lbr: Use freeze based on availability").
> 
> Andrii Nakryiko (4):
>   perf/x86/amd: ensure amd_pmu_core_disable_all() is always inlined
>   perf/x86/amd: avoid taking branches before disabling LBR
>   perf/x86/amd: support capturing LBR from software events
>   perf/x86/amd: don't reject non-sampling events with configured LBR
> 
>  arch/x86/events/amd/core.c   | 37 +++++++++++++++++++++++++++++++++++-
>  arch/x86/events/amd/lbr.c    | 13 +------------
>  arch/x86/events/perf_event.h | 13 +++++++++++++
>  3 files changed, 50 insertions(+), 13 deletions(-)

Applied to tip:perf/core for a v6.10 merge, thanks a lot Andrii!

	Ingo