[PATCH net-next v5 3/8] net: phy: Add helper to set EEE Clock stop enable bit

Oleksij Rempel posted 8 patches 1 year, 11 months ago
There is a newer version of this series
[PATCH net-next v5 3/8] net: phy: Add helper to set EEE Clock stop enable bit
Posted by Oleksij Rempel 1 year, 11 months ago
From: Andrew Lunn <andrew@lunn.ch>

The MAC driver can request that the PHY stops the clock during EEE
LPI. This has normally been does as part of phy_init_eee(), however
that function is overly complex and often wrongly used. Add a
standalone helper, to aid removing phy_init_eee().

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
v2: Add missing EXPORT_SYMBOL_GPL
---
 drivers/net/phy/phy.c | 20 ++++++++++++++++++++
 include/linux/phy.h   |  1 +
 2 files changed, 21 insertions(+)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index a54b1daf5d5f..207e68b0eec6 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -1579,6 +1579,26 @@ void phy_mac_interrupt(struct phy_device *phydev)
 }
 EXPORT_SYMBOL(phy_mac_interrupt);
 
+/**
+ * phy_eee_clk_stop_enable - Clock should stop during LIP
+ * @phydev: target phy_device struct
+ *
+ * Description: Program the MMD register 3.0 setting the "Clock stop enable"
+ * bit.
+ */
+int phy_eee_clk_stop_enable(struct phy_device *phydev)
+{
+	int ret;
+
+	mutex_lock(&phydev->lock);
+	ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,
+			       MDIO_PCS_CTRL1_CLKSTOP_EN);
+	mutex_unlock(&phydev->lock);
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(phy_eee_clk_stop_enable);
+
 /**
  * phy_init_eee - init and check the EEE feature
  * @phydev: target phy_device struct
diff --git a/include/linux/phy.h b/include/linux/phy.h
index a880f6d7170e..432c561f5809 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -1995,6 +1995,7 @@ int phy_unregister_fixup_for_id(const char *bus_id);
 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
 
 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
+int phy_eee_clk_stop_enable(struct phy_device *phydev);
 int phy_get_eee_err(struct phy_device *phydev);
 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data);
 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data);
-- 
2.39.2
Re: [PATCH net-next v5 3/8] net: phy: Add helper to set EEE Clock stop enable bit
Posted by Florian Fainelli 1 year, 11 months ago

On 2/20/2024 10:21 PM, Oleksij Rempel wrote:
> From: Andrew Lunn <andrew@lunn.ch>
> 
> The MAC driver can request that the PHY stops the clock during EEE
> LPI. This has normally been does as part of phy_init_eee(), however
> that function is overly complex and often wrongly used. Add a
> standalone helper, to aid removing phy_init_eee().
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>

It would be useful to also read whether the PHY is capable of stopping 
its clock, this has IMHO always been missing. Clause 45 IEEE PCS Status 
1 Register (3.1) bit 6 reflects whether the PHY is capable of stopping 
its clock.
-- 
Florian
Re: [PATCH net-next v5 3/8] net: phy: Add helper to set EEE Clock stop enable bit
Posted by Oleksij Rempel 1 year, 11 months ago
On Thu, Feb 22, 2024 at 08:47:58PM -0800, Florian Fainelli wrote:
> 
> 
> On 2/20/2024 10:21 PM, Oleksij Rempel wrote:
> > From: Andrew Lunn <andrew@lunn.ch>
> > 
> > The MAC driver can request that the PHY stops the clock during EEE
> > LPI. This has normally been does as part of phy_init_eee(), however
> > that function is overly complex and often wrongly used. Add a
> > standalone helper, to aid removing phy_init_eee().
> > 
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> 
> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
> 
> It would be useful to also read whether the PHY is capable of stopping its
> clock, this has IMHO always been missing. Clause 45 IEEE PCS Status 1
> Register (3.1) bit 6 reflects whether the PHY is capable of stopping its
> clock.

Agreed, there is a extra set of challenges with this functionality. For
example stmmac will fail to reset DMA engine if PHY disabled clock. It will be
good to handle it in a separate patch set.

Regards,
Oleksij
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