This should be considered a dirty hack. The proper solution would be
extracting write_reg logic to a separate regmap driver. Leaving only
"write BIT(2) to address 0x6" to the PHY driver.

The initial commit is already doing things wrong. The following patches
adding hi3798mv100 support is also very confusing. The name of the
enumeration "PHY_TYPE_x" is very misleading as if it's the phy which is
different across SoCs. But actually it's the bus (i.e. how to write to a
given address) which is different, not the PHY.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
---
Yang Xiwen (4):
      dt-binding: phy: hisi-inno-usb2: convert to YAML
      phy: hisilicon: enable clocks for every ports
      phy: hisi-inno-usb2: add support for direct MMIO
      dt-binding: phy: hisi-inno-usb2: add compatible of hisilicon,hi3798mv200-usb2-phy

 .../bindings/phy/hisilicon,inno-usb2-phy.yaml      | 125 +++++++++++++++++++++
 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt |  71 ------------
 drivers/phy/hisilicon/phy-hisi-inno-usb2.c         |  57 ++++++----
 3 files changed, 161 insertions(+), 92 deletions(-)
---
base-commit: 8d3dea210042f54b952b481838c1e7dfc4ec751d
change-id: 20240216-inno-phy-a2d872f6b74b

Best regards,
-- 
Yang Xiwen <forbidden405@outlook.com>

On 16/02/2024 16:21, Yang Xiwen via B4 Relay wrote:
> This should be considered a dirty hack. The proper solution would be
> extracting write_reg logic to a separate regmap driver. Leaving only
> "write BIT(2) to address 0x6" to the PHY driver.
> 
> The initial commit is already doing things wrong. The following patches
> adding hi3798mv100 support is also very confusing. The name of the
> enumeration "PHY_TYPE_x" is very misleading as if it's the phy which is
> different across SoCs. But actually it's the bus (i.e. how to write to a
> given address) which is different, not the PHY.

I have many bounces from your emails. Please do not Cc unrelated,
non-working hisilicon emails.

Best regards,
Krzysztof